Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(539)

Unified Diff: tests_lit/assembler/x86/opcode_register_encodings.ll

Issue 1161543005: Subzero: Changes needed for LLVM 3.7 integration. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « src/IceInst.cpp ('k') | tests_lit/llvm2ice_tests/64bit.pnacl.ll » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: tests_lit/assembler/x86/opcode_register_encodings.ll
diff --git a/tests_lit/assembler/x86/opcode_register_encodings.ll b/tests_lit/assembler/x86/opcode_register_encodings.ll
index bc98b044e9a39dff79ee8e77026923fdc06ab0dd..a232175df330b8b9968b7b4bad347f32527eb5be 100644
--- a/tests_lit/assembler/x86/opcode_register_encodings.ll
+++ b/tests_lit/assembler/x86/opcode_register_encodings.ll
@@ -115,9 +115,9 @@ define <16 x i8> @load_v16xI8(i32 %addr, i32 %addr2, i32 %addr3) {
%addr_v16xI8 = inttoptr i32 %addr to <16 x i8>*
%addr2_v16xI8 = inttoptr i32 %addr2 to <16 x i8>*
%addr3_v16xI8 = inttoptr i32 %addr3 to <16 x i8>*
- %res1 = load <16 x i8>* %addr2_v16xI8, align 1
- %res2 = load <16 x i8>* %addr_v16xI8, align 1
- %res3 = load <16 x i8>* %addr3_v16xI8, align 1
+ %res1 = load <16 x i8>, <16 x i8>* %addr2_v16xI8, align 1
+ %res2 = load <16 x i8>, <16 x i8>* %addr_v16xI8, align 1
+ %res3 = load <16 x i8>, <16 x i8>* %addr3_v16xI8, align 1
%res12 = add <16 x i8> %res1, %res2
%res123 = add <16 x i8> %res12, %res3
ret <16 x i8> %res123
@@ -135,7 +135,7 @@ entry:
%__1 = ptrtoint i8* %ptr to i32
%x = add i32 %__1, %__1
%__3 = inttoptr i32 %x to i32*
- %v = load i32* %__3, align 1
+ %v = load i32, i32* %__3, align 1
%v_add = add i32 %v, 1
%ptr2 = call i8* @llvm.nacl.read.tp()
« no previous file with comments | « src/IceInst.cpp ('k') | tests_lit/llvm2ice_tests/64bit.pnacl.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698