Cleanup interface descriptors to reflect that vectors are part of loads.

src/mips64/debug-mips64.cc

Index: src/mips64/debug-mips64.cc
diff --git a/src/mips64/debug-mips64.cc b/src/mips64/debug-mips64.cc
index e683674e53dab133e9bd56ccd0e9963152e4d018..6067424429414088effc449a9c689b47ae88ea88 100644
--- a/src/mips64/debug-mips64.cc
+++ b/src/mips64/debug-mips64.cc
@@ -156,8 +156,8 @@ void DebugCodegen::GenerateCallICStubDebugBreak(MacroAssembler* masm) {
 void DebugCodegen::GenerateLoadICDebugBreak(MacroAssembler* masm) {
   Register receiver = LoadDescriptor::ReceiverRegister();
   Register name = LoadDescriptor::NameRegister();
-  RegList regs = receiver.bit() | name.bit() |
-                 VectorLoadICTrampolineDescriptor::SlotRegister().bit();
+  Register slot = LoadDescriptor::SlotRegister();
+  RegList regs = receiver.bit() | name.bit() | slot.bit();
   Generate_DebugBreakCallHelper(masm, regs, 0);
 }