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Unified Diff: src/mips64/code-stubs-mips64.cc

Issue 1144063002: Cleanup interface descriptors to reflect that vectors are part of loads. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fixes for test failures. Created 5 years, 7 months ago
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Index: src/mips64/code-stubs-mips64.cc
diff --git a/src/mips64/code-stubs-mips64.cc b/src/mips64/code-stubs-mips64.cc
index 3e2ca1dbf42f4d3c99687ac8117eb7e0518cc595..00c6591cc8384114bfc2096a312fb822f9f6a958 100644
--- a/src/mips64/code-stubs-mips64.cc
+++ b/src/mips64/code-stubs-mips64.cc
@@ -1386,7 +1386,7 @@ void LoadIndexedStringStub::Generate(MacroAssembler* masm) {
Register scratch = a5;
Register result = v0;
DCHECK(!scratch.is(receiver) && !scratch.is(index));
- DCHECK(!scratch.is(VectorLoadICDescriptor::VectorRegister()));
+ DCHECK(!scratch.is(LoadWithVectorDescriptor::VectorRegister()));
StringCharAtGenerator char_at_generator(receiver, index, scratch, result,
&miss, // When not a string.
@@ -1610,8 +1610,8 @@ void FunctionPrototypeStub::Generate(MacroAssembler* masm) {
Register receiver = LoadDescriptor::ReceiverRegister();
// Ensure that the vector and slot registers won't be clobbered before
// calling the miss handler.
- DCHECK(!AreAliased(a4, a5, VectorLoadICDescriptor::VectorRegister(),
- VectorLoadICDescriptor::SlotRegister()));
+ DCHECK(!AreAliased(a4, a5, LoadWithVectorDescriptor::VectorRegister(),
+ LoadWithVectorDescriptor::SlotRegister()));
NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(masm, receiver, a4,
a5, &miss);
@@ -3130,8 +3130,8 @@ void StringCharCodeAtGenerator::GenerateSlow(
call_helper.BeforeCall(masm);
// Consumed by runtime conversion function:
if (embed_mode == PART_OF_IC_HANDLER) {
- __ Push(VectorLoadICDescriptor::VectorRegister(),
- VectorLoadICDescriptor::SlotRegister(), object_, index_);
+ __ Push(LoadWithVectorDescriptor::VectorRegister(),
+ LoadWithVectorDescriptor::SlotRegister(), object_, index_);
} else {
__ Push(object_, index_);
}
@@ -3148,8 +3148,8 @@ void StringCharCodeAtGenerator::GenerateSlow(
__ Move(index_, v0);
if (embed_mode == PART_OF_IC_HANDLER) {
- __ Pop(VectorLoadICDescriptor::VectorRegister(),
- VectorLoadICDescriptor::SlotRegister(), object_);
+ __ Pop(LoadWithVectorDescriptor::VectorRegister(),
+ LoadWithVectorDescriptor::SlotRegister(), object_);
} else {
__ pop(object_);
}
@@ -4626,15 +4626,15 @@ void StubFailureTrampolineStub::Generate(MacroAssembler* masm) {
void LoadICTrampolineStub::Generate(MacroAssembler* masm) {
- EmitLoadTypeFeedbackVector(masm, VectorLoadICDescriptor::VectorRegister());
- VectorRawLoadStub stub(isolate(), state());
+ EmitLoadTypeFeedbackVector(masm, LoadWithVectorDescriptor::VectorRegister());
+ LoadICStub stub(isolate(), state());
stub.GenerateForTrampoline(masm);
}
void KeyedLoadICTrampolineStub::Generate(MacroAssembler* masm) {
- EmitLoadTypeFeedbackVector(masm, VectorLoadICDescriptor::VectorRegister());
- VectorRawKeyedLoadStub stub(isolate());
+ EmitLoadTypeFeedbackVector(masm, LoadWithVectorDescriptor::VectorRegister());
+ KeyedLoadICStub stub(isolate());
stub.GenerateForTrampoline(masm);
}
@@ -4653,12 +4653,10 @@ void CallIC_ArrayTrampolineStub::Generate(MacroAssembler* masm) {
}
-void VectorRawLoadStub::Generate(MacroAssembler* masm) {
- GenerateImpl(masm, false);
-}
+void LoadICStub::Generate(MacroAssembler* masm) { GenerateImpl(masm, false); }
-void VectorRawLoadStub::GenerateForTrampoline(MacroAssembler* masm) {
+void LoadICStub::GenerateForTrampoline(MacroAssembler* masm) {
GenerateImpl(masm, true);
}
@@ -4751,11 +4749,11 @@ static void HandleMonomorphicCase(MacroAssembler* masm, Register receiver,
}
-void VectorRawLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
- Register receiver = VectorLoadICDescriptor::ReceiverRegister(); // a1
- Register name = VectorLoadICDescriptor::NameRegister(); // a2
- Register vector = VectorLoadICDescriptor::VectorRegister(); // a3
- Register slot = VectorLoadICDescriptor::SlotRegister(); // a0
+void LoadICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
+ Register receiver = LoadWithVectorDescriptor::ReceiverRegister(); // a1
+ Register name = LoadWithVectorDescriptor::NameRegister(); // a2
+ Register vector = LoadWithVectorDescriptor::VectorRegister(); // a3
+ Register slot = LoadWithVectorDescriptor::SlotRegister(); // a0
Register feedback = a4;
Register receiver_map = a5;
Register scratch1 = a6;
@@ -4798,21 +4796,21 @@ void VectorRawLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
}
-void VectorRawKeyedLoadStub::Generate(MacroAssembler* masm) {
+void KeyedLoadICStub::Generate(MacroAssembler* masm) {
GenerateImpl(masm, false);
}
-void VectorRawKeyedLoadStub::GenerateForTrampoline(MacroAssembler* masm) {
+void KeyedLoadICStub::GenerateForTrampoline(MacroAssembler* masm) {
GenerateImpl(masm, true);
}
-void VectorRawKeyedLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
- Register receiver = VectorLoadICDescriptor::ReceiverRegister(); // a1
- Register key = VectorLoadICDescriptor::NameRegister(); // a2
- Register vector = VectorLoadICDescriptor::VectorRegister(); // a3
- Register slot = VectorLoadICDescriptor::SlotRegister(); // a0
+void KeyedLoadICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
+ Register receiver = LoadWithVectorDescriptor::ReceiverRegister(); // a1
+ Register key = LoadWithVectorDescriptor::NameRegister(); // a2
+ Register vector = LoadWithVectorDescriptor::VectorRegister(); // a3
+ Register slot = LoadWithVectorDescriptor::SlotRegister(); // a0
Register feedback = a4;
Register receiver_map = a5;
Register scratch1 = a6;
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