DescriptionSubzero ARM32: Lower shift and zext, sext, and trunc.
Sext, etc. usually uses shifts (especially for i1 and i64)
so implement shift, then implement those casts.
Implement just enough of bitcast to handle accessing
global addresses (used by some tests). Otherwise,
most other bitcasts are from GPR to FP and FP regs
aren't modeled yet.
Generally following the GCC style for 64-bit shifts.
This takes advantage of the flexible second operand in a "orr",
and takes advantage of the shift-beyond bitwidth saturation.
LLVM is almost the same, but only seems to take advantage
on one side of the 32-bits, not the other side. Should really
get some of the execution tests running to test this behavior!
Fix InstARM32Str::dump(). Str doesn't have a Dest, so use Src.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=66c3d5ecf3b6a6ce3b3a63c85312777ecbacee24
Patch Set 1 #Patch Set 2 : trunc also #Patch Set 3 : fix some stuff #Patch Set 4 : fix stuff #Patch Set 5 : add 64-bit tests #Patch Set 6 : couple more tests #Patch Set 7 : simplify i1 to i64 #Patch Set 8 : format #Patch Set 9 : clean up a comment #
Total comments: 7
Patch Set 10 : rename variable #
Messages
Total messages: 6 (1 generated)
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