Restrict immediate operands to smi where only smis are supported.

runtime/vm/assembler_x64.cc

Index: runtime/vm/assembler_x64.cc
===================================================================
--- runtime/vm/assembler_x64.cc	(revision 14796)
+++ runtime/vm/assembler_x64.cc	(working copy)
@@ -982,9 +982,14 @@
 
 
 void Assembler::andq(Register dst, const Immediate& imm) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitRegisterREX(dst, REX_W);
-  EmitComplex(4, Operand(dst), imm);
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(dst, REX_W);
+    EmitComplex(4, Operand(dst), imm);
+  } else {
+    movq(TMP, imm);
+    andq(dst, TMP);
+  }
 }
 
 
@@ -1006,9 +1011,14 @@
 
 
 void Assembler::orq(Register dst, const Immediate& imm) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitRegisterREX(dst, REX_W);
-  EmitComplex(1, Operand(dst), imm);
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(dst, REX_W);
+    EmitComplex(1, Operand(dst), imm);
+  } else {
+    movq(TMP, imm);
+    orq(dst, TMP);
+  }
 }
 
 
@@ -1038,9 +1048,14 @@
 
 
 void Assembler::xorq(Register dst, const Immediate& imm) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitRegisterREX(dst, REX_W);
-  EmitComplex(6, Operand(dst), imm);
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(dst, REX_W);
+    EmitComplex(6, Operand(dst), imm);
+  } else {
+    movq(TMP, imm);
+    xorq(dst, TMP);
+  }
 }
 
 
@@ -1076,9 +1091,14 @@
 
 
 void Assembler::addq(Register reg, const Immediate& imm) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitRegisterREX(reg, REX_W);
-  EmitComplex(0, Operand(reg), imm);
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(reg, REX_W);
+    EmitComplex(0, Operand(reg), imm);
+  } else {
+    movq(TMP, imm);
+    addq(reg, TMP);
+  }
 }
 
 
@@ -1156,7 +1176,8 @@
 
 void Assembler::imull(Register reg, const Immediate& imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitRegisterREX(reg, REX_NONE);
+  Operand operand(reg);
+  EmitOperandREX(reg, operand, REX_NONE);
   EmitUint8(0x69);
   EmitOperand(reg & 7, Operand(reg));
   EmitImmediate(imm);
@@ -1173,6 +1194,21 @@
 }
 
 
+void Assembler::imulq(Register reg, const Immediate& imm) {
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    Operand operand(reg);
+    EmitOperandREX(reg, operand, REX_W);
+    EmitUint8(0x69);
+    EmitOperand(reg & 7, Operand(reg));
+    EmitImmediate(imm);
+  } else {
+    movq(TMP, imm);
+    imulq(reg, TMP);
+  }
+}
+
+
 void Assembler::imulq(Register dst, const Address& address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitOperandREX(dst, address, REX_W);
@@ -1192,9 +1228,14 @@
 
 
 void Assembler::subq(Register reg, const Immediate& imm) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitRegisterREX(reg, REX_W);
-  EmitComplex(5, Operand(reg), imm);
+  if (imm.is_int32()) {
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    EmitRegisterREX(reg, REX_W);
+    EmitComplex(5, Operand(reg), imm);
+  } else {
+    movq(TMP, imm);
+    subq(reg, TMP);
+  }
 }