Index: src/compiler/mips64/code-generator-mips64.cc |
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc |
index 94e96d429d17047efd00661acf7c5b59565678c3..5296ea82f7af01cb7ff304df99db54fba9017ab9 100644 |
--- a/src/compiler/mips64/code-generator-mips64.cc |
+++ b/src/compiler/mips64/code-generator-mips64.cc |
@@ -310,7 +310,7 @@ FPUCondition FlagsConditionToConditionCmpD(bool& predicate, |
__ Daddu(at, i.InputRegister(2), offset); \ |
__ asm_instr(result, MemOperand(at, 0)); \ |
} else { \ |
- auto offset = i.InputOperand(0).immediate(); \ |
+ int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
__ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \ |
__ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \ |
} \ |
@@ -328,7 +328,7 @@ FPUCondition FlagsConditionToConditionCmpD(bool& predicate, |
__ Daddu(at, i.InputRegister(2), offset); \ |
__ asm_instr(result, MemOperand(at, 0)); \ |
} else { \ |
- auto offset = i.InputOperand(0).immediate(); \ |
+ int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
__ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \ |
__ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \ |
} \ |
@@ -346,7 +346,7 @@ FPUCondition FlagsConditionToConditionCmpD(bool& predicate, |
__ Daddu(at, i.InputRegister(3), offset); \ |
__ asm_instr(value, MemOperand(at, 0)); \ |
} else { \ |
- auto offset = i.InputOperand(0).immediate(); \ |
+ int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
auto value = i.Input##width##Register(2); \ |
__ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \ |
__ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \ |
@@ -365,7 +365,7 @@ FPUCondition FlagsConditionToConditionCmpD(bool& predicate, |
__ Daddu(at, i.InputRegister(3), offset); \ |
__ asm_instr(value, MemOperand(at, 0)); \ |
} else { \ |
- auto offset = i.InputOperand(0).immediate(); \ |
+ int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
auto value = i.InputRegister(2); \ |
__ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \ |
__ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \ |
@@ -559,24 +559,27 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
if (instr->InputAt(1)->IsRegister()) { |
__ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); |
} else { |
- int32_t imm = i.InputOperand(1).immediate(); |
- __ sll(i.OutputRegister(), i.InputRegister(0), imm); |
+ int64_t imm = i.InputOperand(1).immediate(); |
+ __ sll(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm)); |
} |
break; |
case kMips64Shr: |
if (instr->InputAt(1)->IsRegister()) { |
__ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); |
} else { |
- int32_t imm = i.InputOperand(1).immediate(); |
- __ srl(i.OutputRegister(), i.InputRegister(0), imm); |
+ int64_t imm = i.InputOperand(1).immediate(); |
+ __ srl(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm)); |
} |
break; |
case kMips64Sar: |
if (instr->InputAt(1)->IsRegister()) { |
__ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); |
} else { |
- int32_t imm = i.InputOperand(1).immediate(); |
- __ sra(i.OutputRegister(), i.InputRegister(0), imm); |
+ int64_t imm = i.InputOperand(1).immediate(); |
+ __ sra(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm)); |
} |
break; |
case kMips64Ext: |
@@ -591,11 +594,13 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
if (instr->InputAt(1)->IsRegister()) { |
__ dsllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); |
} else { |
- int32_t imm = i.InputOperand(1).immediate(); |
+ int64_t imm = i.InputOperand(1).immediate(); |
if (imm < 32) { |
- __ dsll(i.OutputRegister(), i.InputRegister(0), imm); |
+ __ dsll(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm)); |
} else { |
- __ dsll32(i.OutputRegister(), i.InputRegister(0), imm - 32); |
+ __ dsll32(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm - 32)); |
} |
} |
break; |
@@ -603,11 +608,13 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
if (instr->InputAt(1)->IsRegister()) { |
__ dsrlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); |
} else { |
- int32_t imm = i.InputOperand(1).immediate(); |
+ int64_t imm = i.InputOperand(1).immediate(); |
if (imm < 32) { |
- __ dsrl(i.OutputRegister(), i.InputRegister(0), imm); |
+ __ dsrl(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm)); |
} else { |
- __ dsrl32(i.OutputRegister(), i.InputRegister(0), imm - 32); |
+ __ dsrl32(i.OutputRegister(), i.InputRegister(0), |
+ static_cast<uint16_t>(imm - 32)); |
} |
} |
break; |
@@ -615,7 +622,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
if (instr->InputAt(1)->IsRegister()) { |
__ dsrav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); |
} else { |
- int32_t imm = i.InputOperand(1).immediate(); |
+ int64_t imm = i.InputOperand(1).immediate(); |
if (imm < 32) { |
__ dsra(i.OutputRegister(), i.InputRegister(0), imm); |
} else { |
@@ -1096,7 +1103,7 @@ void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) { |
Label here; |
__ Branch(GetLabel(i.InputRpo(1)), hs, input, Operand(case_count)); |
- __ BlockTrampolinePoolFor(case_count * 2 + 7); |
+ __ BlockTrampolinePoolFor(static_cast<int>(case_count) * 2 + 7); |
// Ensure that dd-ed labels use 8 byte aligned addresses. |
if ((masm()->pc_offset() & 7) != 0) { |
__ nop(); |