| Index: src/arm64/assembler-arm64-inl.h
|
| diff --git a/src/arm64/assembler-arm64-inl.h b/src/arm64/assembler-arm64-inl.h
|
| index 7d8d81e38d73910b30888c0b235c5ee5c1df7201..373f15dc4b1967bd91f7e960903d6dbe4593766d 100644
|
| --- a/src/arm64/assembler-arm64-inl.h
|
| +++ b/src/arm64/assembler-arm64-inl.h
|
| @@ -1084,13 +1084,14 @@ Instr Assembler::SF(Register rd) {
|
| }
|
|
|
|
|
| -Instr Assembler::ImmAddSub(int64_t imm) {
|
| +Instr Assembler::ImmAddSub(int imm) {
|
| DCHECK(IsImmAddSub(imm));
|
| if (is_uint12(imm)) { // No shift required.
|
| - return imm << ImmAddSub_offset;
|
| + imm <<= ImmAddSub_offset;
|
| } else {
|
| - return ((imm >> 12) << ImmAddSub_offset) | (1 << ShiftAddSub_offset);
|
| + imm = ((imm >> 12) << ImmAddSub_offset) | (1 << ShiftAddSub_offset);
|
| }
|
| + return imm;
|
| }
|
|
|
|
|
| @@ -1239,13 +1240,13 @@ LSDataSize Assembler::CalcLSDataSize(LoadStoreOp op) {
|
| }
|
|
|
|
|
| -Instr Assembler::ImmMoveWide(uint64_t imm) {
|
| +Instr Assembler::ImmMoveWide(int imm) {
|
| DCHECK(is_uint16(imm));
|
| return imm << ImmMoveWide_offset;
|
| }
|
|
|
|
|
| -Instr Assembler::ShiftMoveWide(int64_t shift) {
|
| +Instr Assembler::ShiftMoveWide(int shift) {
|
| DCHECK(is_uint2(shift));
|
| return shift << ShiftMoveWide_offset;
|
| }
|
|
|