Faster 64-bit right-shift for the ia32 compiler.

runtime/vm/assembler_ia32.cc

Index: runtime/vm/assembler_ia32.cc
===================================================================
--- runtime/vm/assembler_ia32.cc	(revision 13286)
+++ runtime/vm/assembler_ia32.cc	(working copy)
@@ -1220,7 +1220,7 @@
 
 
 void Assembler::shll(Register operand, Register shifter) {
-  EmitGenericShift(4, operand, shifter);
+  EmitGenericShift(4, Operand(operand), shifter);
 }
 
 
@@ -1230,7 +1230,7 @@
 
 
 void Assembler::shrl(Register operand, Register shifter) {
-  EmitGenericShift(5, operand, shifter);
+  EmitGenericShift(5, Operand(operand), shifter);
 }
 
 
@@ -1240,10 +1240,15 @@
 
 
 void Assembler::sarl(Register operand, Register shifter) {
-  EmitGenericShift(7, operand, shifter);
+  EmitGenericShift(7, Operand(operand), shifter);
 }
 
 
+void Assembler::sarl(const Address& address, Register shifter) {
+  EmitGenericShift(7, Operand(address), shifter);
+}
+
+
 void Assembler::shld(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
@@ -1252,6 +1257,22 @@
 }
 
 
+void Assembler::shrd(Register dst, Register src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0xAD);
+  EmitRegisterOperand(src, dst);
+}
+
+
+void Assembler::shrd(const Address& dst, Register src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0xAD);
+  EmitOperand(src, Operand(dst));
+}
+
+
 void Assembler::negl(Register reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xF7);
@@ -1906,7 +1927,7 @@
 
 
 void Assembler::EmitGenericShift(int rm,
-                                 Register operand,
+                                 const Operand& operand,
                                  Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   ASSERT(shifter == ECX);