| Index: runtime/vm/assembler_ia32.cc
|
| ===================================================================
|
| --- runtime/vm/assembler_ia32.cc (revision 13168)
|
| +++ runtime/vm/assembler_ia32.cc (working copy)
|
| @@ -365,6 +365,24 @@
|
| }
|
|
|
|
|
| +void Assembler::movq(const Address& dst, XmmRegister src) {
|
| + AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| + EmitUint8(0x66);
|
| + EmitUint8(0x0F);
|
| + EmitUint8(0xD6);
|
| + EmitOperand(src, Operand(dst));
|
| +}
|
| +
|
| +
|
| +void Assembler::movq(XmmRegister dst, const Address& src) {
|
| + AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| + EmitUint8(0xF3);
|
| + EmitUint8(0x0F);
|
| + EmitUint8(0x7E);
|
| + EmitOperand(dst, Operand(src));
|
| +}
|
| +
|
| +
|
| void Assembler::addss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1035,6 +1053,13 @@
|
| }
|
|
|
|
|
| +void Assembler::adcl(const Address& address, Register reg) {
|
| + AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| + EmitUint8(0x11);
|
| + EmitOperand(reg, address);
|
| +}
|
| +
|
| +
|
| void Assembler::subl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x2B);
|
| @@ -1055,6 +1080,13 @@
|
| }
|
|
|
|
|
| +void Assembler::subl(const Address& address, Register reg) {
|
| + AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| + EmitUint8(0x29);
|
| + EmitOperand(reg, address);
|
| +}
|
| +
|
| +
|
| void Assembler::cdq() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x99);
|
| @@ -1140,6 +1172,13 @@
|
| }
|
|
|
|
|
| +void Assembler::sbbl(const Address& address, Register dst) {
|
| + AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| + EmitUint8(0x19);
|
| + EmitOperand(dst, address);
|
| +}
|
| +
|
| +
|
| void Assembler::incl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x40 + reg);
|
|
|