Add fast 64-bit integer ADD and SUB to the optimizing compiler.

runtime/vm/assembler_ia32_test.cc

Index: runtime/vm/assembler_ia32_test.cc
===================================================================
--- runtime/vm/assembler_ia32_test.cc	(revision 13168)
+++ runtime/vm/assembler_ia32_test.cc	(working copy)
@@ -1500,7 +1500,6 @@
 
 
 ASSEMBLER_TEST_GENERATE(LongAddAddress, assembler) {
-  // Preserve clobbered callee-saved register (EBX).
   __ movl(EAX, Address(ESP, 1 * kWordSize));  // left low.
   __ movl(EDX, Address(ESP, 2 * kWordSize));  // left high.
   __ addl(EAX, Address(ESP, 3 * kWordSize));  // low.
@@ -1552,7 +1551,6 @@
 
 
 ASSEMBLER_TEST_GENERATE(LongSubAddress, assembler) {
-  // Preserve clobbered callee-saved register (EBX).
   __ movl(EAX, Address(ESP, 1 * kWordSize));  // left low.
   __ movl(EDX, Address(ESP, 2 * kWordSize));  // left high.
   __ subl(EAX, Address(ESP, 3 * kWordSize));  // low.
@@ -1575,6 +1573,74 @@
 }
 
 
+ASSEMBLER_TEST_GENERATE(LongSubAddress2, assembler) {
+  // Preserve clobbered callee-saved register (EBX).
+  __ pushl(EBX);
+  __ movl(EAX, Address(ESP, 2 * kWordSize));  // left low.
+  __ movl(EDX, Address(ESP, 3 * kWordSize));  // left high.
+  __ movl(ECX, Address(ESP, 4 * kWordSize));  // right low.
+  __ movl(EBX, Address(ESP, 5 * kWordSize));  // right high
+  __ subl(ESP, Immediate(2 * kWordSize));
+  __ movl(Address(ESP, 0 * kWordSize), EAX);  // left low.
+  __ movl(Address(ESP, 1 * kWordSize), EDX);  // left high.
+  __ subl(Address(ESP, 0 * kWordSize), ECX);
+  __ sbbl(Address(ESP, 1 * kWordSize), EBX);
+  __ movl(EAX, Address(ESP, 0 * kWordSize));
+  __ movl(EDX, Address(ESP, 1 * kWordSize));
+  __ addl(ESP, Immediate(2 * kWordSize));
+  __ popl(EBX);
+  // Result is in EAX/EDX.
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(LongSubAddress2, entry) {
+  typedef int64_t (*LongSubAddress2Code)(int64_t a, int64_t b);
+  int64_t a = 12;
+  int64_t b = 14;
+  int64_t res = reinterpret_cast<LongSubAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a - b), res);
+  a = 600000;
+  b = 2147483647;
+  res = reinterpret_cast<LongSubAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a - b), res);
+}
+
+
+ASSEMBLER_TEST_GENERATE(LongAddAddress2, assembler) {
+  // Preserve clobbered callee-saved register (EBX).
+  __ pushl(EBX);
+  __ movl(EAX, Address(ESP, 2 * kWordSize));  // left low.
+  __ movl(EDX, Address(ESP, 3 * kWordSize));  // left high.
+  __ movl(ECX, Address(ESP, 4 * kWordSize));  // right low.
+  __ movl(EBX, Address(ESP, 5 * kWordSize));  // right high
+  __ subl(ESP, Immediate(2 * kWordSize));
+  __ movl(Address(ESP, 0 * kWordSize), EAX);  // left low.
+  __ movl(Address(ESP, 1 * kWordSize), EDX);  // left high.
+  __ addl(Address(ESP, 0 * kWordSize), ECX);
+  __ adcl(Address(ESP, 1 * kWordSize), EBX);
+  __ movl(EAX, Address(ESP, 0 * kWordSize));
+  __ movl(EDX, Address(ESP, 1 * kWordSize));
+  __ addl(ESP, Immediate(2 * kWordSize));
+  __ popl(EBX);
+  // Result is in EAX/EDX.
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(LongAddAddress2, entry) {
+  typedef int64_t (*LongAddAddress2Code)(int64_t a, int64_t b);
+  int64_t a = 12;
+  int64_t b = 14;
+  int64_t res = reinterpret_cast<LongAddAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a + b), res);
+  a = 600000;
+  b = 2147483647;
+  res = reinterpret_cast<LongAddAddress2Code>(entry)(a, b);
+  EXPECT_EQ((a + b), res);
+}
+
+
 // Testing only the lower 64-bit value of 'cvtdq2pd'.
 ASSEMBLER_TEST_GENERATE(IntegerToDoubleConversion, assembler) {
   __ movsd(XMM1, Address(ESP, kWordSize));
@@ -1681,8 +1747,8 @@
   if (CPUFeatures::sse4_1_supported()) {
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ pextrd(EAX, XMM0, Immediate(0));
-    __ ret();
   }
+  __ ret();
 }
 
 
@@ -1699,8 +1765,8 @@
   if (CPUFeatures::sse4_1_supported()) {
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ pextrd(EAX, XMM0, Immediate(1));
-    __ ret();
   }
+  __ ret();
 }
 
 
@@ -1718,8 +1784,8 @@
     __ movsd(XMM0, Address(ESP, kWordSize));
     __ pmovsxdq(XMM0, XMM0);
     __ pextrd(EAX, XMM0, Immediate(1));
-    __ ret();
   }
+  __ ret();
 }
 
 
@@ -1738,8 +1804,8 @@
     __ xorpd(XMM1, XMM1);
     __ pcmpeqq(XMM0, XMM1);
     __ movd(EAX, XMM0);
-    __ ret();
   }
+  __ ret();
 }
 
 
@@ -1772,6 +1838,23 @@
 }
 
 
+ASSEMBLER_TEST_GENERATE(Movq, assembler) {
+  __ movq(XMM0, Address(ESP, kWordSize));
+  __ subl(ESP, Immediate(kDoubleSize));
+  __ movq(Address(ESP, 0), XMM0);
+  __ fldl(Address(ESP, 0));
+  __ addl(ESP, Immediate(kDoubleSize));
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(Movq, entry) {
+  typedef double (*MovqCode)(double d);
+  double res = reinterpret_cast<MovqCode>(entry)(12.34e5);
+  EXPECT_FLOAT_EQ(12.34e5, res, 0.0);
+}
+
+
 ASSEMBLER_TEST_GENERATE(DoubleAbs, assembler) {
   __ movsd(XMM0, Address(ESP, kWordSize));
   __ DoubleAbs(XMM0);