Implement bigint shift intrinsics on IA32.

runtime/vm/assembler_ia32.cc

Index: runtime/vm/assembler_ia32.cc
===================================================================
--- runtime/vm/assembler_ia32.cc	(revision 45179)
+++ runtime/vm/assembler_ia32.cc	(working copy)
@@ -1771,8 +1771,9 @@
 }
 
 
-void Assembler::shldl(Register dst, Register src) {
+void Assembler::shldl(Register dst, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xA5);
   EmitRegisterOperand(src, dst);
@@ -1789,8 +1790,9 @@
 }
 
 
-void Assembler::shldl(const Address& operand, Register src) {
+void Assembler::shldl(const Address& operand, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xA5);
   EmitOperand(src, Operand(operand));
@@ -1797,8 +1799,9 @@
 }
 
 
-void Assembler::shrdl(Register dst, Register src) {
+void Assembler::shrdl(Register dst, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xAD);
   EmitRegisterOperand(src, dst);
@@ -1815,8 +1818,9 @@
 }
 
 
-void Assembler::shrdl(const Address& dst, Register src) {
+void Assembler::shrdl(const Address& dst, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xAD);
   EmitOperand(src, Operand(dst));