Implement bigint shift intrinsics on IA32.

runtime/vm/assembler_ia32.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_IA32)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/cpu.h"
@@ skipping 1753 matching lines @@
 void Assembler::sarl(Register operand, Register shifter) {
   EmitGenericShift(7, Operand(operand), shifter);
 }
 
 
 void Assembler::sarl(const Address& address, Register shifter) {
   EmitGenericShift(7, Operand(address), shifter);
 }
 
 
-void Assembler::shldl(Register dst, Register src) {
+void Assembler::shldl(Register dst, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xA5);
   EmitRegisterOperand(src, dst);
 }
 
 
 void Assembler::shldl(Register dst, Register src, const Immediate& imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   ASSERT(imm.is_int8());
   EmitUint8(0x0F);
   EmitUint8(0xA4);
   EmitRegisterOperand(src, dst);
   EmitUint8(imm.value() & 0xFF);
 }
 
 
-void Assembler::shldl(const Address& operand, Register src) {
+void Assembler::shldl(const Address& operand, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xA5);
   EmitOperand(src, Operand(operand));
 }
 
 
-void Assembler::shrdl(Register dst, Register src) {
+void Assembler::shrdl(Register dst, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xAD);
   EmitRegisterOperand(src, dst);
 }
 
 
 void Assembler::shrdl(Register dst, Register src, const Immediate& imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   ASSERT(imm.is_int8());
   EmitUint8(0x0F);
   EmitUint8(0xAC);
   EmitRegisterOperand(src, dst);
   EmitUint8(imm.value() & 0xFF);
 }
 
 
-void Assembler::shrdl(const Address& dst, Register src) {
+void Assembler::shrdl(const Address& dst, Register src, Register shifter) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(shifter == ECX);
   EmitUint8(0x0F);
   EmitUint8(0xAD);
   EmitOperand(src, Operand(dst));
 }
 
 
 void Assembler::negl(Register reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xF7);
   EmitOperand(3, Operand(reg));
@@ skipping 1271 matching lines @@
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_IA32