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Issue 10876054: MIPS: Cleanup handling of shifts: SHR can deoptimize only when its a shift by 0, all other shift ne… (Closed)

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Created:
1 year, 8 months ago by palfia
Modified:
1 year, 5 months ago
CC:
v8-dev_googlegroups.com
Visibility:
Public.

Description

MIPS: Cleanup handling of shifts: SHR can deoptimize only when its a shift by 0, all other shift never deoptimize.

Port r12373 (9fdde2ad)

Original commit message:
Fix DoDeferredNumberTagU to keep the value in xmm1 instead of xmm0 on x64.

xmm0 is not saved across runtime call on x64 because MacroAssembler::EnterExitFrameEpilogue preserves only allocatable XMM registers unlike on ia32 where it preserves all registers.

Cleanup handling of shifts: SHR can deoptimize only when its a shift by 0, all other shift never deoptimize.

Fix type inference for i-to-t change instruction. On X64 this ensures that write-barrier is generated correctly.

BUG=
TEST=

Committed: https://code.google.com/p/v8/source/detail?r=12831

Patch Set 1 #

Patch Set 2 : Rebased on r12414 #

Unified diffs Side-by-side diffs Delta from patch set Stats (+6 lines, -8 lines) Lint Patch
M src/mips/lithium-mips.cc View 1 1 chunk +6 lines, -8 lines 0 comments ? errors Download
Trybot results:
Commit:

Messages

Total messages: 3
palfia
This patch requires the following CL to be landed first: https://chromiumcodereview.appspot.com/10874047
1 year, 8 months ago #1
palfia
Rebased on r12414
1 year, 7 months ago #2
danno
1 year, 5 months ago #3
lgtm
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