runtime/vm/flow_graph_compiler_mips.cc - Issue 1074533002: Replace MIPS TraceSimMsg calls with Comment calls.

Unified Diff: runtime/vm/flow_graph_compiler_mips.cc

Issue 1074533002: Replace MIPS TraceSimMsg calls with Comment calls. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/

Patch Set: Created 5 years, 8 months ago

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Index: runtime/vm/flow_graph_compiler_mips.cc

===================================================================

--- runtime/vm/flow_graph_compiler_mips.cc (revision 44977)

+++ runtime/vm/flow_graph_compiler_mips.cc (working copy)

@@ -203,7 +203,7 @@

void FlowGraphCompiler::GenerateBoolToJump(Register bool_register,

Label* is_true,

Label* is_false) {

- __ TraceSimMsg("BoolToJump");

+ __ Comment("BoolToJump");

Label fall_through;

__ BranchEqual(bool_register, Object::null_object(), &fall_through);

__ BranchEqual(bool_register, Bool::True(), is_true);

@@ -221,7 +221,7 @@

Label* is_instance_lbl,

Label* is_not_instance_lbl) {

- __ TraceSimMsg("CallSubtypeTestStub");

+ __ Comment("CallSubtypeTestStub");

ASSERT(instance_reg == A0);

ASSERT(temp_reg == kNoRegister); // Unused on MIPS.

const SubtypeTestCache& type_test_cache =

@@ -330,7 +330,7 @@

const GrowableArray<intptr_t>& class_ids,

Label* is_equal_lbl,

Label* is_not_equal_lbl) {

- __ TraceSimMsg("CheckClassIds");

+ __ Comment("CheckClassIds");

for (intptr_t i = 0; i < class_ids.length(); i++) {

__ BranchEqual(class_id_reg, Immediate(class_ids[i]), is_equal_lbl);

}

@@ -348,7 +348,6 @@

const AbstractType& type,

Label* is_instance_lbl,

Label* is_not_instance_lbl) {

- __ TraceSimMsg("InstantiatedTypeNoArgumentsTest");

__ Comment("InstantiatedTypeNoArgumentsTest");

ASSERT(type.IsInstantiated());

const Class& type_class = Class::Handle(type.type_class());

@@ -413,7 +412,6 @@

const Class& type_class,

Label* is_instance_lbl,

Label* is_not_instance_lbl) {

- __ TraceSimMsg("Subtype1TestCacheLookup");

__ Comment("Subtype1TestCacheLookup");

const Register kInstanceReg = A0;

__ LoadClass(T0, kInstanceReg);

@@ -441,7 +439,6 @@

const AbstractType& type,

Label* is_instance_lbl,

Label* is_not_instance_lbl) {

- __ TraceSimMsg("UninstantiatedTypeTest");

__ Comment("UninstantiatedTypeTest");

ASSERT(!type.IsInstantiated());

// Skip check if destination is a dynamic type.

@@ -521,7 +518,6 @@

const AbstractType& type,

Label* is_instance_lbl,

Label* is_not_instance_lbl) {

- __ TraceSimMsg("InlineInstanceof");

__ Comment("InlineInstanceof");

if (type.IsVoidType()) {

// A non-null value is returned from a void function, which will result in a

@@ -665,7 +661,7 @@

const AbstractType& dst_type,

const String& dst_name,

LocationSummary* locs) {

- __ TraceSimMsg("AssertAssignable");

+ __ Comment("AssertAssignable");

ASSERT(token_pos >= 0);

ASSERT(!dst_type.IsNull());

ASSERT(dst_type.IsFinalized());

@@ -758,7 +754,6 @@

// Input parameters:

// S4: arguments descriptor array.

void FlowGraphCompiler::CopyParameters() {

- __ TraceSimMsg("CopyParameters");

__ Comment("Copy parameters");

const Function& function = parsed_function().function();

LocalScope* scope = parsed_function().node_sequence()->scope();

@@ -1087,7 +1082,6 @@

function.IsClosureFunction() && !flow_graph().IsCompiledForOsr();

#endif

if (check_arguments) {

- __ TraceSimMsg("Check argument count");

__ Comment("Check argument count");

// Check that exactly num_fixed arguments are passed in.

Label correct_num_arguments, wrong_num_arguments;

@@ -1124,7 +1118,6 @@

// null.

if (!is_optimizing()) {

ASSERT(num_locals > 0); // There is always at least context_var.

- __ TraceSimMsg("Initialize spill slots");

__ Comment("Initialize spill slots");

const intptr_t slot_base = parsed_function().first_stack_local_index();

const intptr_t context_index =

@@ -1254,7 +1247,7 @@

// top-level function (parsed_function().function()) which could be

// reoptimized and which counter needs to be incremented.

// Pass the function explicitly, it is used in IC stub.

- __ TraceSimMsg("OptimizedInstanceCall");

+ __ Comment("OptimizedInstanceCall");

__ LoadObject(T0, parsed_function().function());

__ LoadObject(S5, ic_data);

GenerateDartCall(deopt_id,

@@ -1273,7 +1266,7 @@

intptr_t token_pos,

LocationSummary* locs) {

ASSERT(Array::Handle(ic_data.arguments_descriptor()).Length() > 0);

- __ TraceSimMsg("InstanceCall");

+ __ Comment("InstanceCall");

__ LoadObject(S5, ic_data);

GenerateDartCall(deopt_id,

token_pos,

@@ -1280,7 +1273,7 @@

target_label,

RawPcDescriptors::kIcCall,

locs);

- __ TraceSimMsg("InstanceCall return");

+ __ Comment("InstanceCall return");

__ Drop(argument_count);

#if defined(DEBUG)

__ LoadImmediate(S4, kInvalidObjectPointer);

@@ -1301,7 +1294,7 @@

ASSERT(!arguments_descriptor.IsNull() && (arguments_descriptor.Length() > 0));

const MegamorphicCache& cache =

MegamorphicCache::ZoneHandle(table->Lookup(name, arguments_descriptor));

- __ TraceSimMsg("MegamorphicInstanceCall");

+ __ Comment("MegamorphicInstanceCall");

__ lw(T0, Address(SP, (argument_count - 1) * kWordSize));

__ LoadTaggedClassIdMayBeSmi(T0, T0);

@@ -1384,7 +1377,7 @@

intptr_t token_pos,

LocationSummary* locs) {

StubCode* stub_code = isolate()->stub_code();

- __ TraceSimMsg("StaticCall");

+ __ Comment("StaticCall");

__ LoadObject(S4, arguments_descriptor);

// Do not use the code from the function, but let the code be patched so that

// we can record the outgoing edges to other code.

@@ -1403,7 +1396,7 @@

const Object& obj,

bool needs_number_check,

intptr_t token_pos) {

- __ TraceSimMsg("EqualityRegConstCompare");

+ __ Comment("EqualityRegConstCompare");

ASSERT(!needs_number_check ||

(!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint()));

if (needs_number_check) {

@@ -1425,7 +1418,7 @@

Isolate::kNoDeoptId,

token_pos);

}

- __ TraceSimMsg("EqualityRegConstCompare return");

+ __ Comment("EqualityRegConstCompare return");

// Stub returns result in CMPRES1 (if it is 0, then reg and obj are equal).

__ lw(reg, Address(SP, 1 * kWordSize)); // Restore 'reg'.

__ addiu(SP, SP, Immediate(2 * kWordSize)); // Discard constant.

@@ -1442,7 +1435,6 @@

bool needs_number_check,

intptr_t token_pos) {

- __ TraceSimMsg("EqualityRegRegCompare");

__ Comment("EqualityRegRegCompare");

if (needs_number_check) {

StubCode* stub_code = isolate()->stub_code();

@@ -1468,7 +1460,7 @@

__ LoadImmediate(S5, kInvalidObjectPointer);

}

#endif

- __ TraceSimMsg("EqualityRegRegCompare return");

+ __ Comment("EqualityRegRegCompare return");

// Stub returns result in CMPRES1 (if it is 0, then left and right are

// equal).

__ lw(right, Address(SP, 0 * kWordSize));

@@ -1489,7 +1481,7 @@

ClobberDeadTempRegisters(locs);

#endif

- __ TraceSimMsg("SaveLiveRegisters");

+ __ Comment("SaveLiveRegisters");

// TODO(vegorov): consider saving only caller save (volatile) registers.

const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount();

if (fpu_regs_count > 0) {

@@ -1531,7 +1523,7 @@

void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) {

// General purpose registers have the highest register number at the

// lowest address.

- __ TraceSimMsg("RestoreLiveRegisters");

+ __ Comment("RestoreLiveRegisters");

const intptr_t cpu_registers = locs->live_registers()->cpu_registers();

ASSERT((cpu_registers & ~kAllCpuRegistersList) == 0);

const int register_count = Utils::CountOneBits(cpu_registers);

@@ -1601,7 +1593,6 @@

argument_names));

StubCode* stub_code = isolate()->stub_code();

- __ TraceSimMsg("EmitTestAndCall");

__ Comment("EmitTestAndCall");

__ LoadObject(S4, arguments_descriptor);

for (intptr_t i = 0; i < len; i++) {

@@ -1639,7 +1630,7 @@

MoveOperands* move = moves_[index];

const Location source = move->src();

const Location destination = move->dest();

- __ TraceSimMsg("ParallelMoveResolver::EmitMove");

+ __ Comment("ParallelMoveResolver::EmitMove");

if (source.IsRegister()) {

if (destination.IsRegister()) {

@@ -1794,7 +1785,7 @@

void ParallelMoveResolver::MoveMemoryToMemory(const Address& dst,

const Address& src) {

- __ TraceSimMsg("ParallelMoveResolver::MoveMemoryToMemory");

+ __ Comment("ParallelMoveResolver::MoveMemoryToMemory");

__ lw(TMP, src);

__ sw(TMP, dst);

}

@@ -1801,7 +1792,7 @@

void ParallelMoveResolver::StoreObject(const Address& dst, const Object& obj) {

- __ TraceSimMsg("ParallelMoveResolver::StoreObject");

+ __ Comment("ParallelMoveResolver::StoreObject");

__ LoadObject(TMP, obj);

__ sw(TMP, dst);

}

@@ -1845,19 +1836,19 @@

void ParallelMoveResolver::SpillScratch(Register reg) {

- __ TraceSimMsg("ParallelMoveResolver::SpillScratch");

+ __ Comment("ParallelMoveResolver::SpillScratch");

__ Push(reg);

}

void ParallelMoveResolver::RestoreScratch(Register reg) {

- __ TraceSimMsg("ParallelMoveResolver::RestoreScratch");

+ __ Comment("ParallelMoveResolver::RestoreScratch");

__ Pop(reg);

}

void ParallelMoveResolver::SpillFpuScratch(FpuRegister reg) {

- __ TraceSimMsg("ParallelMoveResolver::SpillFpuScratch");

+ __ Comment("ParallelMoveResolver::SpillFpuScratch");

__ AddImmediate(SP, -kDoubleSize);

__ StoreDToOffset(reg, SP, 0);

}

@@ -1864,7 +1855,7 @@

void ParallelMoveResolver::RestoreFpuScratch(FpuRegister reg) {

- __ TraceSimMsg("ParallelMoveResolver::RestoreFpuScratch");

+ __ Comment("ParallelMoveResolver::RestoreFpuScratch");

__ LoadDFromOffset(reg, SP, 0);

__ AddImmediate(SP, kDoubleSize);

}

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