Replace MIPS TraceSimMsg calls with Comment calls.

runtime/vm/flow_graph_compiler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 185 matching lines @@
 }
 
 
 #define __ assembler()->
 
 
 // Fall through if bool_register contains null.
 void FlowGraphCompiler::GenerateBoolToJump(Register bool_register,
                                            Label* is_true,
                                            Label* is_false) {
-  __ TraceSimMsg("BoolToJump");
+  __ Comment("BoolToJump");
   Label fall_through;
   __ BranchEqual(bool_register, Object::null_object(), &fall_through);
   __ BranchEqual(bool_register, Bool::True(), is_true);
   __ b(is_false);
   __ Bind(&fall_through);
 }
 
 
 // A0: instance (must be preserved).
 // A1: instantiator type arguments (if used).
 RawSubtypeTestCache* FlowGraphCompiler::GenerateCallSubtypeTestStub(
     TypeTestStubKind test_kind,
     Register instance_reg,
     Register type_arguments_reg,
     Register temp_reg,
     Label* is_instance_lbl,
     Label* is_not_instance_lbl) {
-  __ TraceSimMsg("CallSubtypeTestStub");
+  __ Comment("CallSubtypeTestStub");
   ASSERT(instance_reg == A0);
   ASSERT(temp_reg == kNoRegister);  // Unused on MIPS.
   const SubtypeTestCache& type_test_cache =
       SubtypeTestCache::ZoneHandle(SubtypeTestCache::New());
   StubCode* stub_code = isolate()->stub_code();
   __ LoadObject(A2, type_test_cache);
   if (test_kind == kTestTypeOneArg) {
     ASSERT(type_arguments_reg == kNoRegister);
     __ LoadImmediate(A1, reinterpret_cast<int32_t>(Object::null()));
     __ BranchLink(&stub_code->Subtype1TestCacheLabel());
@@ skipping 88 matching lines @@
                                      kTempReg,
                                      is_instance_lbl,
                                      is_not_instance_lbl);
 }
 
 
 void FlowGraphCompiler::CheckClassIds(Register class_id_reg,
                                       const GrowableArray<intptr_t>& class_ids,
                                       Label* is_equal_lbl,
                                       Label* is_not_equal_lbl) {
-  __ TraceSimMsg("CheckClassIds");
+  __ Comment("CheckClassIds");
   for (intptr_t i = 0; i < class_ids.length(); i++) {
     __ BranchEqual(class_id_reg, Immediate(class_ids[i]), is_equal_lbl);
   }
   __ b(is_not_equal_lbl);
 }
 
 
 // Testing against an instantiated type with no arguments, without
 // SubtypeTestCache.
 // A0: instance being type checked (preserved).
 // Clobbers: T0, T1, T2
 // Returns true if there is a fallthrough.
 bool FlowGraphCompiler::GenerateInstantiatedTypeNoArgumentsTest(
     intptr_t token_pos,
     const AbstractType& type,
     Label* is_instance_lbl,
     Label* is_not_instance_lbl) {
-  __ TraceSimMsg("InstantiatedTypeNoArgumentsTest");
   __ Comment("InstantiatedTypeNoArgumentsTest");
   ASSERT(type.IsInstantiated());
   const Class& type_class = Class::Handle(type.type_class());
   ASSERT(type_class.NumTypeArguments() == 0);
 
   const Register kInstanceReg = A0;
   __ andi(T0, A0, Immediate(kSmiTagMask));
   // If instance is Smi, check directly.
   const Class& smi_class = Class::Handle(Smi::Class());
   if (smi_class.IsSubtypeOf(TypeArguments::Handle(),
@@ skipping 44 matching lines @@
 // Clobbers A1, A2, T0-T3.
 // Immediate class test already done.
 // TODO(srdjan): Implement a quicker subtype check, as type test
 // arrays can grow too high, but they may be useful when optimizing
 // code (type-feedback).
 RawSubtypeTestCache* FlowGraphCompiler::GenerateSubtype1TestCacheLookup(
     intptr_t token_pos,
     const Class& type_class,
     Label* is_instance_lbl,
     Label* is_not_instance_lbl) {
-  __ TraceSimMsg("Subtype1TestCacheLookup");
   __ Comment("Subtype1TestCacheLookup");
   const Register kInstanceReg = A0;
   __ LoadClass(T0, kInstanceReg);
   // T0: instance class.
   // Check immediate superclass equality.
   __ lw(T0, FieldAddress(T0, Class::super_type_offset()));
   __ lw(T0, FieldAddress(T0, Type::type_class_offset()));
   __ BranchEqual(T0, type_class, is_instance_lbl);
 
   const Register kTypeArgumentsReg = kNoRegister;
   const Register kTempReg = kNoRegister;
   return GenerateCallSubtypeTestStub(kTestTypeOneArg,
                                      kInstanceReg,
                                      kTypeArgumentsReg,
                                      kTempReg,
                                      is_instance_lbl,
                                      is_not_instance_lbl);
 }
 
 
 // Generates inlined check if 'type' is a type parameter or type itself
 // A0: instance (preserved).
 RawSubtypeTestCache* FlowGraphCompiler::GenerateUninstantiatedTypeTest(
     intptr_t token_pos,
     const AbstractType& type,
     Label* is_instance_lbl,
     Label* is_not_instance_lbl) {
-  __ TraceSimMsg("UninstantiatedTypeTest");
   __ Comment("UninstantiatedTypeTest");
   ASSERT(!type.IsInstantiated());
   // Skip check if destination is a dynamic type.
   if (type.IsTypeParameter()) {
     const TypeParameter& type_param = TypeParameter::Cast(type);
     // Load instantiator (or null) and instantiator type arguments on stack.
     __ lw(A1, Address(SP, 0));  // Get instantiator type arguments.
     // A1: instantiator type arguments.
     // Check if type arguments are null, i.e. equivalent to vector of dynamic.
     __ LoadImmediate(T7, reinterpret_cast<int32_t>(Object::null()));
@@ skipping 59 matching lines @@
 // - preserved instance in A0 and optional instantiator type arguments in A1.
 // Clobbers: T0, T1, T2
 // Note that this inlined code must be followed by the runtime_call code, as it
 // may fall through to it. Otherwise, this inline code will jump to the label
 // is_instance or to the label is_not_instance.
 RawSubtypeTestCache* FlowGraphCompiler::GenerateInlineInstanceof(
     intptr_t token_pos,
     const AbstractType& type,
     Label* is_instance_lbl,
     Label* is_not_instance_lbl) {
-  __ TraceSimMsg("InlineInstanceof");
   __ Comment("InlineInstanceof");
   if (type.IsVoidType()) {
     // A non-null value is returned from a void function, which will result in a
     // type error. A null value is handled prior to executing this inline code.
     return SubtypeTestCache::null();
   }
   if (type.IsInstantiated()) {
     const Class& type_class = Class::ZoneHandle(type.type_class());
     // A class equality check is only applicable with a dst type of a
     // non-parameterized class, non-signature class, or with a raw dst type of
@@ skipping 123 matching lines @@
 // Returns:
 // - object in A0 for successful assignable check (or throws TypeError).
 // Clobbers: T0, T1, T2
 // Performance notes: positive checks must be quick, negative checks can be slow
 // as they throw an exception.
 void FlowGraphCompiler::GenerateAssertAssignable(intptr_t token_pos,
                                                  intptr_t deopt_id,
                                                  const AbstractType& dst_type,
                                                  const String& dst_name,
                                                  LocationSummary* locs) {
-  __ TraceSimMsg("AssertAssignable");
+  __ Comment("AssertAssignable");
   ASSERT(token_pos >= 0);
   ASSERT(!dst_type.IsNull());
   ASSERT(dst_type.IsFinalized());
   // Assignable check is skipped in FlowGraphBuilder, not here.
   ASSERT(dst_type.IsMalformedOrMalbounded() ||
          (!dst_type.IsDynamicType() && !dst_type.IsObjectType()));
   // Preserve instantiator and its type arguments.
   __ addiu(SP, SP, Immediate(-2 * kWordSize));
   __ sw(A2, Address(SP, 1 * kWordSize));
 
@@ skipping 72 matching lines @@
   Definition* defn = instr->AsDefinition();
   if ((defn != NULL) && defn->HasTemp()) {
     __ Push(defn->locs()->out(0).reg());
   }
 }
 
 
 // Input parameters:
 //   S4: arguments descriptor array.
 void FlowGraphCompiler::CopyParameters() {
-  __ TraceSimMsg("CopyParameters");
   __ Comment("Copy parameters");
   const Function& function = parsed_function().function();
   LocalScope* scope = parsed_function().node_sequence()->scope();
   const int num_fixed_params = function.num_fixed_parameters();
   const int num_opt_pos_params = function.NumOptionalPositionalParameters();
   const int num_opt_named_params = function.NumOptionalNamedParameters();
   const int num_params =
       num_fixed_params + num_opt_pos_params + num_opt_named_params;
   ASSERT(function.NumParameters() == num_params);
   ASSERT(parsed_function().first_parameter_index() == kFirstLocalSlotFromFp);
@@ skipping 308 matching lines @@
   // unless we are in debug mode or unless we are compiling a closure.
   if (num_copied_params == 0) {
 #ifdef DEBUG
     ASSERT(!parsed_function().function().HasOptionalParameters());
     const bool check_arguments = !flow_graph().IsCompiledForOsr();
 #else
     const bool check_arguments =
         function.IsClosureFunction() && !flow_graph().IsCompiledForOsr();
 #endif
     if (check_arguments) {
-      __ TraceSimMsg("Check argument count");
       __ Comment("Check argument count");
       // Check that exactly num_fixed arguments are passed in.
       Label correct_num_arguments, wrong_num_arguments;
       __ lw(T0, FieldAddress(S4, ArgumentsDescriptor::count_offset()));
       __ BranchNotEqual(T0, Immediate(Smi::RawValue(num_fixed_params)),
                         &wrong_num_arguments);
 
       __ lw(T1, FieldAddress(S4,
                              ArgumentsDescriptor::positional_count_offset()));
       __ beq(T0, T1, &correct_num_arguments);
@@ skipping 16 matching lines @@
     LocalScope* scope = parsed_function().node_sequence()->scope();
     LocalVariable* closure_parameter = scope->VariableAt(0);
     __ lw(CTX, Address(FP, closure_parameter->index() * kWordSize));
     __ lw(CTX, FieldAddress(CTX, Closure::context_offset()));
   }
 
   // In unoptimized code, initialize (non-argument) stack allocated slots to
   // null.
   if (!is_optimizing()) {
     ASSERT(num_locals > 0);  // There is always at least context_var.
-    __ TraceSimMsg("Initialize spill slots");
     __ Comment("Initialize spill slots");
     const intptr_t slot_base = parsed_function().first_stack_local_index();
     const intptr_t context_index =
         parsed_function().current_context_var()->index();
     if (num_locals > 1) {
       __ LoadImmediate(V0, reinterpret_cast<int32_t>(Object::null()));
     }
     for (intptr_t i = 0; i < num_locals; ++i) {
       // Subtract index i (locals lie at lower addresses than FP).
       if (((slot_base - i) == context_index)) {
@@ skipping 109 matching lines @@
     intptr_t deopt_id,
     intptr_t token_pos,
     LocationSummary* locs) {
   ASSERT(Array::Handle(ic_data.arguments_descriptor()).Length() > 0);
   // Each ICData propagated from unoptimized to optimized code contains the
   // function that corresponds to the Dart function of that IC call. Due
   // to inlining in optimized code, that function may not correspond to the
   // top-level function (parsed_function().function()) which could be
   // reoptimized and which counter needs to be incremented.
   // Pass the function explicitly, it is used in IC stub.
-  __ TraceSimMsg("OptimizedInstanceCall");
+  __ Comment("OptimizedInstanceCall");
   __ LoadObject(T0, parsed_function().function());
   __ LoadObject(S5, ic_data);
   GenerateDartCall(deopt_id,
                    token_pos,
                    target_label,
                    RawPcDescriptors::kIcCall,
                    locs);
   __ Drop(argument_count);
 }
 
 
 void FlowGraphCompiler::EmitInstanceCall(ExternalLabel* target_label,
                                          const ICData& ic_data,
                                          intptr_t argument_count,
                                          intptr_t deopt_id,
                                          intptr_t token_pos,
                                          LocationSummary* locs) {
   ASSERT(Array::Handle(ic_data.arguments_descriptor()).Length() > 0);
-  __ TraceSimMsg("InstanceCall");
+  __ Comment("InstanceCall");
   __ LoadObject(S5, ic_data);
   GenerateDartCall(deopt_id,
                    token_pos,
                    target_label,
                    RawPcDescriptors::kIcCall,
                    locs);
-  __ TraceSimMsg("InstanceCall return");
+  __ Comment("InstanceCall return");
   __ Drop(argument_count);
 #if defined(DEBUG)
   __ LoadImmediate(S4, kInvalidObjectPointer);
 #endif
 }
 
 
 void FlowGraphCompiler::EmitMegamorphicInstanceCall(
     const ICData& ic_data,
     intptr_t argument_count,
     intptr_t deopt_id,
     intptr_t token_pos,
     LocationSummary* locs) {
   MegamorphicCacheTable* table = Isolate::Current()->megamorphic_cache_table();
   const String& name = String::Handle(ic_data.target_name());
   const Array& arguments_descriptor =
       Array::ZoneHandle(ic_data.arguments_descriptor());
   ASSERT(!arguments_descriptor.IsNull() && (arguments_descriptor.Length() > 0));
   const MegamorphicCache& cache =
       MegamorphicCache::ZoneHandle(table->Lookup(name, arguments_descriptor));
-  __ TraceSimMsg("MegamorphicInstanceCall");
+  __ Comment("MegamorphicInstanceCall");
   __ lw(T0, Address(SP, (argument_count - 1) * kWordSize));
   __ LoadTaggedClassIdMayBeSmi(T0, T0);
 
   // T0: class ID of the receiver (smi).
   __ LoadObject(T1, cache);
   __ lw(T2, FieldAddress(T1, MegamorphicCache::buckets_offset()));
   __ lw(T1, FieldAddress(T1, MegamorphicCache::mask_offset()));
   // T2: cache buckets array.
   // T1: mask.
   __ mov(T3, T0);
@@ skipping 62 matching lines @@
 
 
 void FlowGraphCompiler::EmitOptimizedStaticCall(
     const Function& function,
     const Array& arguments_descriptor,
     intptr_t argument_count,
     intptr_t deopt_id,
     intptr_t token_pos,
     LocationSummary* locs) {
   StubCode* stub_code = isolate()->stub_code();
-  __ TraceSimMsg("StaticCall");
+  __ Comment("StaticCall");
   __ LoadObject(S4, arguments_descriptor);
   // Do not use the code from the function, but let the code be patched so that
   // we can record the outgoing edges to other code.
   GenerateDartCall(deopt_id,
                    token_pos,
                    &stub_code->CallStaticFunctionLabel(),
                    RawPcDescriptors::kOptStaticCall,
                    locs);
   AddStaticCallTarget(function);
   __ Drop(argument_count);
 }
 
 
 Condition FlowGraphCompiler::EmitEqualityRegConstCompare(
     Register reg,
     const Object& obj,
     bool needs_number_check,
     intptr_t token_pos) {
-  __ TraceSimMsg("EqualityRegConstCompare");
+  __ Comment("EqualityRegConstCompare");
   ASSERT(!needs_number_check ||
          (!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint()));
   if (needs_number_check) {
     StubCode* stub_code = isolate()->stub_code();
     ASSERT(!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint());
     __ addiu(SP, SP, Immediate(-2 * kWordSize));
     __ sw(reg, Address(SP, 1 * kWordSize));
     __ LoadObject(TMP, obj);
     __ sw(TMP, Address(SP, 0 * kWordSize));
     if (is_optimizing()) {
       __ BranchLinkPatchable(
           &stub_code->OptimizedIdenticalWithNumberCheckLabel());
     } else {
       __ BranchLinkPatchable(
           &stub_code->UnoptimizedIdenticalWithNumberCheckLabel());
     }
     if (token_pos != Scanner::kNoSourcePos) {
       AddCurrentDescriptor(RawPcDescriptors::kRuntimeCall,
                            Isolate::kNoDeoptId,
                            token_pos);
     }
-    __ TraceSimMsg("EqualityRegConstCompare return");
+    __ Comment("EqualityRegConstCompare return");
     // Stub returns result in CMPRES1 (if it is 0, then reg and obj are equal).
     __ lw(reg, Address(SP, 1 * kWordSize));  // Restore 'reg'.
     __ addiu(SP, SP, Immediate(2 * kWordSize));  // Discard constant.
     return Condition(CMPRES1, ZR, EQ);
   } else {
     int16_t imm = 0;
     const Register obj_reg = __ LoadConditionOperand(CMPRES1, obj, &imm);
     return Condition(reg, obj_reg, EQ, imm);
   }
 }
 
 
 Condition FlowGraphCompiler::EmitEqualityRegRegCompare(Register left,
                                                        Register right,
                                                        bool needs_number_check,
                                                        intptr_t token_pos) {
-  __ TraceSimMsg("EqualityRegRegCompare");
   __ Comment("EqualityRegRegCompare");
   if (needs_number_check) {
     StubCode* stub_code = isolate()->stub_code();
     __ addiu(SP, SP, Immediate(-2 * kWordSize));
     __ sw(left, Address(SP, 1 * kWordSize));
     __ sw(right, Address(SP, 0 * kWordSize));
     if (is_optimizing()) {
       __ BranchLinkPatchable(
           &stub_code->OptimizedIdenticalWithNumberCheckLabel());
     } else {
       __ BranchLinkPatchable(
           &stub_code->UnoptimizedIdenticalWithNumberCheckLabel());
     }
     if (token_pos != Scanner::kNoSourcePos) {
       AddCurrentDescriptor(RawPcDescriptors::kRuntimeCall,
                            Isolate::kNoDeoptId,
                            token_pos);
     }
 #if defined(DEBUG)
     if (!is_optimizing()) {
       // Do this *after* adding the pc descriptor!
       __ LoadImmediate(S4, kInvalidObjectPointer);
       __ LoadImmediate(S5, kInvalidObjectPointer);
     }
 #endif
-    __ TraceSimMsg("EqualityRegRegCompare return");
+    __ Comment("EqualityRegRegCompare return");
     // Stub returns result in CMPRES1 (if it is 0, then left and right are
     // equal).
     __ lw(right, Address(SP, 0 * kWordSize));
     __ lw(left, Address(SP, 1 * kWordSize));
     __ addiu(SP, SP, Immediate(2 * kWordSize));
     return Condition(CMPRES1, ZR, EQ);
   } else {
     return Condition(left, right, EQ);
   }
 }
 
 
 // This function must be in sync with FlowGraphCompiler::RecordSafepoint and
 // FlowGraphCompiler::SlowPathEnvironmentFor.
 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
 #if defined(DEBUG)
   locs->CheckWritableInputs();
   ClobberDeadTempRegisters(locs);
 #endif
 
-  __ TraceSimMsg("SaveLiveRegisters");
+  __ Comment("SaveLiveRegisters");
   // TODO(vegorov): consider saving only caller save (volatile) registers.
   const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount();
   if (fpu_regs_count > 0) {
     __ AddImmediate(SP, -(fpu_regs_count * kFpuRegisterSize));
     // Store fpu registers with the lowest register number at the lowest
     // address.
     intptr_t offset = 0;
     for (intptr_t reg_idx = 0; reg_idx < kNumberOfFpuRegisters; ++reg_idx) {
       DRegister fpu_reg = static_cast<DRegister>(reg_idx);
       if (locs->live_registers()->ContainsFpuRegister(fpu_reg)) {
@@ skipping 21 matching lines @@
       }
     }
     ASSERT(offset == 0);
   }
 }
 
 
 void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) {
   // General purpose registers have the highest register number at the
   // lowest address.
-  __ TraceSimMsg("RestoreLiveRegisters");
+  __ Comment("RestoreLiveRegisters");
   const intptr_t cpu_registers = locs->live_registers()->cpu_registers();
   ASSERT((cpu_registers & ~kAllCpuRegistersList) == 0);
   const int register_count = Utils::CountOneBits(cpu_registers);
   if (register_count > 0) {
     intptr_t offset = register_count * kWordSize;
     for (int i = 0; i < kNumberOfCpuRegisters; i++) {
       Register r = static_cast<Register>(i);
       if (locs->live_registers()->ContainsRegister(r)) {
         offset -= kWordSize;
         __ lw(r, Address(SP, offset));
@@ skipping 49 matching lines @@
   const intptr_t len = ic_data.NumberOfChecks();
   GrowableArray<CidTarget> sorted(len);
   SortICDataByCount(ic_data, &sorted, /* drop_smi = */ false);
   ASSERT(class_id_reg != S4);
   ASSERT(len > 0);  // Why bother otherwise.
   const Array& arguments_descriptor =
       Array::ZoneHandle(ArgumentsDescriptor::New(argument_count,
                                                  argument_names));
   StubCode* stub_code = isolate()->stub_code();
 
-  __ TraceSimMsg("EmitTestAndCall");
   __ Comment("EmitTestAndCall");
   __ LoadObject(S4, arguments_descriptor);
   for (intptr_t i = 0; i < len; i++) {
     const bool is_last_check = (i == (len - 1));
     Label next_test;
     if (is_last_check) {
       __ BranchNotEqual(class_id_reg, Immediate(sorted[i].cid), deopt);
     } else {
       __ BranchNotEqual(class_id_reg, Immediate(sorted[i].cid), &next_test);
     }
@@ skipping 17 matching lines @@
 
 
 #undef __
 #define __ compiler_->assembler()->
 
 
 void ParallelMoveResolver::EmitMove(int index) {
   MoveOperands* move = moves_[index];
   const Location source = move->src();
   const Location destination = move->dest();
-  __ TraceSimMsg("ParallelMoveResolver::EmitMove");
+  __ Comment("ParallelMoveResolver::EmitMove");
 
   if (source.IsRegister()) {
     if (destination.IsRegister()) {
       __ mov(destination.reg(), source.reg());
     } else {
       ASSERT(destination.IsStackSlot());
       const intptr_t dest_offset = destination.ToStackSlotOffset();
       __ StoreToOffset(source.reg(), destination.base_reg(), dest_offset);
     }
   } else if (source.IsStackSlot()) {
@@ skipping 134 matching lines @@
       moves_[i]->set_src(destination);
     } else if (other_move.Blocks(destination)) {
       moves_[i]->set_src(source);
     }
   }
 }
 
 
 void ParallelMoveResolver::MoveMemoryToMemory(const Address& dst,
                                               const Address& src) {
-  __ TraceSimMsg("ParallelMoveResolver::MoveMemoryToMemory");
+  __ Comment("ParallelMoveResolver::MoveMemoryToMemory");
   __ lw(TMP, src);
   __ sw(TMP, dst);
 }
 
 
 void ParallelMoveResolver::StoreObject(const Address& dst, const Object& obj) {
-  __ TraceSimMsg("ParallelMoveResolver::StoreObject");
+  __ Comment("ParallelMoveResolver::StoreObject");
   __ LoadObject(TMP, obj);
   __ sw(TMP, dst);
 }
 
 
 // Do not call or implement this function. Instead, use the form below that
 // uses an offset from the frame pointer instead of an Address.
 void ParallelMoveResolver::Exchange(Register reg, const Address& mem) {
   UNREACHABLE();
 }
@@ skipping 23 matching lines @@
   ScratchRegisterScope tmp1(this, kNoRegister);
   ScratchRegisterScope tmp2(this, tmp1.reg());
   __ LoadFromOffset(tmp1.reg(), base_reg1, stack_offset1);
   __ LoadFromOffset(tmp2.reg(), base_reg2, stack_offset2);
   __ StoreToOffset(tmp1.reg(), base_reg1, stack_offset2);
   __ StoreToOffset(tmp2.reg(), base_reg2, stack_offset1);
 }
 
 
 void ParallelMoveResolver::SpillScratch(Register reg) {
-  __ TraceSimMsg("ParallelMoveResolver::SpillScratch");
+  __ Comment("ParallelMoveResolver::SpillScratch");
   __ Push(reg);
 }
 
 
 void ParallelMoveResolver::RestoreScratch(Register reg) {
-  __ TraceSimMsg("ParallelMoveResolver::RestoreScratch");
+  __ Comment("ParallelMoveResolver::RestoreScratch");
   __ Pop(reg);
 }
 
 
 void ParallelMoveResolver::SpillFpuScratch(FpuRegister reg) {
-  __ TraceSimMsg("ParallelMoveResolver::SpillFpuScratch");
+  __ Comment("ParallelMoveResolver::SpillFpuScratch");
   __ AddImmediate(SP, -kDoubleSize);
   __ StoreDToOffset(reg, SP, 0);
 }
 
 
 void ParallelMoveResolver::RestoreFpuScratch(FpuRegister reg) {
-  __ TraceSimMsg("ParallelMoveResolver::RestoreFpuScratch");
+  __ Comment("ParallelMoveResolver::RestoreFpuScratch");
   __ LoadDFromOffset(reg, SP, 0);
   __ AddImmediate(SP, kDoubleSize);
 }
 
 
 #undef __
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS