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Issue 1068823004: Fixes bug in LoadIndexedInstr on ARM. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "vm/cpu.h" 10 #include "vm/cpu.h"
(...skipping 1265 matching lines...) Expand 10 before | Expand all | Expand 10 after
1276 break; 1276 break;
1277 default: 1277 default:
1278 UNREACHABLE(); 1278 UNREACHABLE();
1279 } 1279 }
1280 return; 1280 return;
1281 } 1281 }
1282 1282
1283 if ((representation() == kUnboxedUint32) || 1283 if ((representation() == kUnboxedUint32) ||
1284 (representation() == kUnboxedInt32)) { 1284 (representation() == kUnboxedInt32)) {
1285 Register result = locs()->out(0).reg(); 1285 Register result = locs()->out(0).reg();
1286 if ((index_scale() == 1) && index.IsRegister()) {
1287 __ SmiUntag(index.reg());
1288 }
1289 switch (class_id()) { 1286 switch (class_id()) {
1290 case kTypedDataInt32ArrayCid: 1287 case kTypedDataInt32ArrayCid:
1291 ASSERT(representation() == kUnboxedInt32); 1288 ASSERT(representation() == kUnboxedInt32);
1292 __ ldr(result, element_address); 1289 __ ldr(result, element_address);
1293 break; 1290 break;
1294 case kTypedDataUint32ArrayCid: 1291 case kTypedDataUint32ArrayCid:
1295 ASSERT(representation() == kUnboxedUint32); 1292 ASSERT(representation() == kUnboxedUint32);
1296 __ ldr(result, element_address); 1293 __ ldr(result, element_address);
1297 break; 1294 break;
1298 default: 1295 default:
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6878 1, 6875 1,
6879 locs()); 6876 locs());
6880 __ Drop(1); 6877 __ Drop(1);
6881 __ Pop(result); 6878 __ Pop(result);
6882 } 6879 }
6883 6880
6884 6881
6885 } // namespace dart 6882 } // namespace dart
6886 6883
6887 #endif // defined TARGET_ARCH_ARM 6884 #endif // defined TARGET_ARCH_ARM
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