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Unified Diff: src/mips64/simulator-mips64.h

Issue 1057323002: MIPS: Major fixes and clean-up in asm. for instruction encoding. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Typos addressed. Created 5 years, 8 months ago
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Index: src/mips64/simulator-mips64.h
diff --git a/src/mips64/simulator-mips64.h b/src/mips64/simulator-mips64.h
index a4271ce3105fb222ee33f7091e19a379f4f8b75a..63172389a35a1aaaa3dafd3d5356480df1a95795 100644
--- a/src/mips64/simulator-mips64.h
+++ b/src/mips64/simulator-mips64.h
@@ -313,17 +313,17 @@ class Simulator {
inline int32_t SetDoubleLOW(double* addr);
// functions called from DecodeTypeRegister
- void DecodeTypeRegisterCOP1(Instruction* instr, const int64_t& rs_reg,
+ void DecodeTypeRegisterCOP1(Instruction* instr, const int32_t& rs_reg,
const int64_t& rs, const uint64_t& rs_u,
- const int64_t& rt_reg, const int64_t& rt,
- const uint64_t& rt_u, const int64_t& rd_reg,
+ const int32_t& rt_reg, const int64_t& rt,
+ const uint64_t& rt_u, const int32_t& rd_reg,
const int32_t& fr_reg, const int32_t& fs_reg,
- const int32_t& ft_reg, const int64_t& fd_reg,
+ const int32_t& ft_reg, const int32_t& fd_reg,
int64_t& alu_out);
void DecodeTypeRegisterCOP1X(Instruction* instr, const int32_t& fr_reg,
const int32_t& fs_reg, const int32_t& ft_reg,
- const int64_t& fd_reg);
+ const int32_t& fd_reg);
void DecodeTypeRegisterSPECIAL(
Instruction* instr, const int64_t& rs_reg, const int64_t& rs,
@@ -341,10 +341,10 @@ class Simulator {
int64_t& alu_out);
void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& fs_reg,
- const int32_t& ft_reg, const int64_t& fd_reg);
+ const int32_t& ft_reg, const int32_t& fd_reg);
void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fs_reg,
- const int64_t& ft_reg, const int32_t& fd_reg);
+ const int32_t& ft_reg, const int32_t& fd_reg);
void DecodeTypeRegisterWRsType(Instruction* instr, const int32_t& fs_reg,
const int32_t& fd_reg, int64_t& alu_out);
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