Finish 'MIPS: [turbofan] Add backend support for float32 operations.'

test/cctest/test-assembler-mips.cc

Index: test/cctest/test-assembler-mips.cc
diff --git a/test/cctest/test-assembler-mips.cc b/test/cctest/test-assembler-mips.cc
index d29419e2ff18f18f37e7d1c7476f373e2e749c80..a46102879c6c1d7b63458316c19068365e0f2214 100644
--- a/test/cctest/test-assembler-mips.cc
+++ b/test/cctest/test-assembler-mips.cc
@@ -46,6 +46,8 @@ typedef Object* (*F1)(int x, int p1, int p2, int p3, int p4);
 typedef Object* (*F2)(int x, int y, int p2, int p3, int p4);
 typedef Object* (*F3)(void* p, int p1, int p2, int p3, int p4);
 
+// clang-format off

[jochen (gone - plz use gerrit), 2015/11/25 13:00:26]

please don't do this. clang-format off is meant to be used a small scope, not a
blanket thing for the entire file.

+
 
 #define __ assm.
 TEST(MIPS16) {
@@ -347,6 +349,13 @@ TEST(MIPS3) {
     double g;
     double h;
     double i;
+    float fa;
+    float fb;
+    float fc;
+    float fd;
+    float fe;
+    float ff;
+    float fg;
   } T;
   T t;
 
@@ -355,6 +364,7 @@ TEST(MIPS3) {
   MacroAssembler assm(isolate, NULL, 0);
   Label L, C;
 
+  // Double precision floating point instructions.
   __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
   __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
   __ add_d(f8, f4, f6);
@@ -387,6 +397,30 @@ TEST(MIPS3) {
     __ sdc1(f14, MemOperand(a0, OFFSET_OF(T, h)) );
   }
 
+  // Single precision floating point instructions.
+  __ lwc1(f4, MemOperand(a0, OFFSET_OF(T, fa)) );
+  __ lwc1(f6, MemOperand(a0, OFFSET_OF(T, fb)) );
+  __ add_s(f8, f4, f6);
+  __ swc1(f8, MemOperand(a0, OFFSET_OF(T, fc)) );  // fc = fa + fb.
+
+  __ neg_s(f10, f6);  // -fb
+  __ sub_s(f10, f8, f10);
+  __ swc1(f10, MemOperand(a0, OFFSET_OF(T, fd)) );  // fd = fc - (-fb).
+
+  __ swc1(f4, MemOperand(a0, OFFSET_OF(T, fb)) );   // fb = fa.
+
+  __ li(t0, 120);
+  __ mtc1(t0, f14);
+  __ cvt_s_w(f14, f14);   // f14 = 120.0.
+  __ mul_s(f10, f10, f14);
+  __ swc1(f10, MemOperand(a0, OFFSET_OF(T, fe)) );  // fe = fd * 120
+
+  __ div_s(f12, f10, f4);
+  __ swc1(f12, MemOperand(a0, OFFSET_OF(T, ff)) );  // ff = fe / fa
+
+  __ sqrt_s(f14, f12);
+  __ swc1(f14, MemOperand(a0, OFFSET_OF(T, fg)) );
+
   __ jr(ra);
   __ nop();
 
@@ -395,6 +429,7 @@ TEST(MIPS3) {
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
   F3 f = FUNCTION_CAST<F3>(code->entry());
+  // Double test values.
   t.a = 1.5e14;
   t.b = 2.75e11;
   t.c = 0.0;
@@ -403,8 +438,16 @@ TEST(MIPS3) {
   t.f = 0.0;
   t.h = 1.5;
   t.i = 2.75;
+  // Single test values.
+  t.fa = 1.5e6;
+  t.fb = 2.75e4;
+  t.fc = 0.0;
+  t.fd = 0.0;
+  t.fe = 0.0;
+  t.ff = 0.0;
   Object* dummy = CALL_GENERATED_CODE(f, &t, 0, 0, 0, 0);
   USE(dummy);
+  // Expected double results.
   CHECK_EQ(1.5e14, t.a);
   CHECK_EQ(1.5e14, t.b);
   CHECK_EQ(1.50275e14, t.c);
@@ -415,6 +458,14 @@ TEST(MIPS3) {
   if (IsMipsArchVariant(kMips32r2)) {
     CHECK_EQ(6.875, t.h);
   }
+  // Expected single results.
+  CHECK_EQ(1.5e6, t.fa);
+  CHECK_EQ(1.5e6, t.fb);
+  CHECK_EQ(1.5275e06, t.fc);
+  CHECK_EQ(1.5550e06, t.fd);
+  CHECK_EQ(1.866e08, t.fe);
+  CHECK_EQ(124.40000152587890625, t.ff);
+  CHECK_EQ(11.1534748077392578125, t.fg);
 }