Refactor and improve code for pow.

Refactor and improve code for pow.

R=zra@google.com

Committed: https://code.google.com/p/dart/source/detail?r=35946

[zra, 2014-05-08 19:07:57]

lgtm

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5143: const DRegister saved_base =
EvenDRegisterOf(locs->temp(1).fpu_reg());
Now that I stare at this harder, I think you can use OddDRegisterOf in(0),
in(1), or out(0) as a temporary D register to avoid allocating a temp fpu
register. Also, there is no need to clear it out after use. I think we can also
make this optimization in other places, if needed. Alternately, use
OddDRegisterOf(QTMP)

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5151: __ vcmpd(exp, DTMP);
__ vcmpdz(exp); and remove load of zero into DTMP.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5220: __ vcmpd(base, DTMP);
__ vcmpdz(base); and remove immediate load.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_arm64.cc (right):

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm64.cc:3642: __ fcmpd(exp, VTMP);
__ fcmpdz(exp)

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm64.cc:3706: __ fcmpd(base, VTMP);
__ fcmpdz(base);

[srdjan, 2014-05-08 22:15:31]

Thanks

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5143: const DRegister saved_base =
EvenDRegisterOf(locs->temp(1).fpu_reg());
On 2014/05/08 19:07:57, zra wrote:
> Now that I stare at this harder, I think you can use OddDRegisterOf in(0),
> in(1), or out(0) as a temporary D register to avoid allocating a temp fpu
> register. Also, there is no need to clear it out after use. I think we can
also
> make this optimization in other places, if needed. Alternately, use
> OddDRegisterOf(QTMP)

Done.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5151: __ vcmpd(exp, DTMP);
On 2014/05/08 19:07:57, zra wrote:
> __ vcmpdz(exp); and remove load of zero into DTMP.

Done.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5151: __ vcmpd(exp, DTMP);
On 2014/05/08 19:07:57, zra wrote:
> __ vcmpdz(exp); and remove load of zero into DTMP.

Done.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm.cc:5220: __ vcmpd(base, DTMP);
On 2014/05/08 19:07:57, zra wrote:
> __ vcmpdz(base); and remove immediate load.

Done.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
File runtime/vm/intermediate_language_arm64.cc (right):

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm64.cc:3642: __ fcmpd(exp, VTMP);
On 2014/05/08 19:07:57, zra wrote:
> __ fcmpdz(exp)

Done.

https://codereview.chromium.org/270743004/diff/50001/runtime/vm/intermediate_...
runtime/vm/intermediate_language_arm64.cc:3706: __ fcmpd(base, VTMP);
On 2014/05/08 19:07:57, zra wrote:
> __ fcmpdz(base);

Done.

[srdjan, 2014-05-08 22:18:10]

Committed patchset #5 manually as r35946 (presubmit successful).