|
Begins implementation of ARM neon instructions.
Just adds the vadd instruction, but also changes the
arm assembler to expose the Q registers rather than the
D registers. Q0 = D1:D0 = S3:S2:S1:S0. This is similar
to how ia32 and x64 use only the xmm registers for
floating point.
R=regis@google.com
Committed: https://code.google.com/p/dart/source/detail?r=24982
Total comments: 14
Total comments: 3
|
Unified diffs |
Side-by-side diffs |
Delta from patch set |
Stats (+549 lines, -76 lines) |
Patch |
|
M |
runtime/platform/globals.h
|
View
|
1
2
3
|
2 chunks |
+3 lines, -3 lines |
0 comments
|
Download
|
|
M |
runtime/vm/assembler_arm.h
|
View
|
1
2
3
|
3 chunks |
+8 lines, -0 lines |
0 comments
|
Download
|
|
M |
runtime/vm/assembler_arm.cc
|
View
|
1
2
3
|
7 chunks |
+49 lines, -6 lines |
0 comments
|
Download
|
|
M |
runtime/vm/assembler_arm_test.cc
|
View
|
1
2
3
|
1 chunk |
+175 lines, -0 lines |
0 comments
|
Download
|
|
M |
runtime/vm/constants_arm.h
|
View
|
1
2
3
|
5 chunks |
+70 lines, -12 lines |
0 comments
|
Download
|
|
M |
runtime/vm/disassembler_arm.cc
|
View
|
1
2
3
|
15 chunks |
+74 lines, -9 lines |
0 comments
|
Download
|
|
M |
runtime/vm/flow_graph_compiler_arm.cc
|
View
|
1
2
3
|
10 chunks |
+39 lines, -19 lines |
2 comments
|
Download
|
|
M |
runtime/vm/intermediate_language_arm.cc
|
View
|
1
2
3
4
|
14 chunks |
+35 lines, -24 lines |
1 comment
|
Download
|
|
M |
runtime/vm/simulator_arm.h
|
View
|
1
2
3
|
4 chunks |
+12 lines, -1 line |
0 comments
|
Download
|
|
M |
runtime/vm/simulator_arm.cc
|
View
|
1
2
3
|
3 chunks |
+83 lines, -1 line |
0 comments
|
Download
|
|
M |
runtime/vm/stub_code_arm.cc
|
View
|
1
2
3
|
1 chunk |
+1 line, -1 line |
0 comments
|
Download
|
Total messages: 5 (0 generated)
|