Implement a few more features on ARM.

Implement a few more features on ARM.
The vm tests byte_array_test and byte_array_optimized_test still fail due to
an inlining bug on ARM.

R=zra@google.com

Committed: https://code.google.com/p/dart/source/detail?r=23370

[zra, 2013-05-29 22:54:07]

lgtm

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
runtime/vm/intermediate_language_arm.cc:2102: const intptr_t kNumTemps = 0;
Could you have just one kNumTemps and one summary declaration, like kNumInputs?

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
runtime/vm/intermediate_language_arm.cc:2470: __ vldrd(result,
FieldAddress(value, Double::value_offset()));
You can't use FieldAddress in vldrd, right?

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
runtime/vm/intermediate_language_arm.cc:2473: __ vmovsr(S0, value);
I didn't check, but if there is a problem with register allocation, it might be
worth double-checking that the register allocator knows that it can't use S0.

[regis, 2013-05-29 23:10:14]

Thanks!

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
runtime/vm/intermediate_language_arm.cc:2102: const intptr_t kNumTemps = 0;
On 2013/05/29 22:54:07, zra wrote:
> Could you have just one kNumTemps and one summary declaration, like
kNumInputs?

Done.

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
runtime/vm/intermediate_language_arm.cc:2470: __ vldrd(result,
FieldAddress(value, Double::value_offset()));
On 2013/05/29 22:54:07, zra wrote:
> You can't use FieldAddress in vldrd, right?

Done.

https://codereview.chromium.org/15899010/diff/1/runtime/vm/intermediate_langu...
runtime/vm/intermediate_language_arm.cc:2473: __ vmovsr(S0, value);
On 2013/05/29 22:54:07, zra wrote:
> I didn't check, but if there is a problem with register allocation, it might
be
> worth double-checking that the register allocator knows that it can't use S0.

FpuTMP is set to D0 on ARM. So D0 will not be used by the allocator.
S0, which is overlapped by D0 is therefore free. The allocator otherwise does
not deal with single precision fpu registers. So I think we are fine.

[regis, 2013-05-29 23:12:25]

Committed patchset #3 manually as r23370 (presubmit successful).