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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
| 6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/simulator.h" | 9 #include "vm/simulator.h" |
| 10 #include "vm/runtime_entry.h" | 10 #include "vm/runtime_entry.h" |
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| 1474 *offset_mask = 0xff; | 1474 *offset_mask = 0xff; |
| 1475 return Utils::IsAbsoluteUint(8, offset); // Addressing mode 3. | 1475 return Utils::IsAbsoluteUint(8, offset); // Addressing mode 3. |
| 1476 } | 1476 } |
| 1477 case kLoadUnsignedByte: | 1477 case kLoadUnsignedByte: |
| 1478 case kLoadWord: { | 1478 case kLoadWord: { |
| 1479 *offset_mask = 0xfff; | 1479 *offset_mask = 0xfff; |
| 1480 return Utils::IsAbsoluteUint(12, offset); // Addressing mode 2. | 1480 return Utils::IsAbsoluteUint(12, offset); // Addressing mode 2. |
| 1481 } | 1481 } |
| 1482 case kLoadSWord: | 1482 case kLoadSWord: |
| 1483 case kLoadDWord: { | 1483 case kLoadDWord: { |
| 1484 *offset_mask = 0x3ff; | 1484 *offset_mask = 0x3fc; // Multiple of 4. |
| 1485 return Utils::IsAbsoluteUint(10, offset); // VFP addressing mode. | 1485 // VFP addressing mode. |
| 1486 return (Utils::IsAbsoluteUint(10, offset) && Utils::IsAligned(offset, 4)); |
| 1486 } | 1487 } |
| 1487 default: { | 1488 default: { |
| 1488 UNREACHABLE(); | 1489 UNREACHABLE(); |
| 1489 return false; | 1490 return false; |
| 1490 } | 1491 } |
| 1491 } | 1492 } |
| 1492 } | 1493 } |
| 1493 | 1494 |
| 1494 | 1495 |
| 1495 bool Address::CanHoldStoreOffset(StoreOperandType type, | 1496 bool Address::CanHoldStoreOffset(StoreOperandType type, |
| 1496 int32_t offset, | 1497 int32_t offset, |
| 1497 int32_t* offset_mask) { | 1498 int32_t* offset_mask) { |
| 1498 switch (type) { | 1499 switch (type) { |
| 1499 case kStoreHalfword: | 1500 case kStoreHalfword: |
| 1500 case kStoreWordPair: { | 1501 case kStoreWordPair: { |
| 1501 *offset_mask = 0xff; | 1502 *offset_mask = 0xff; |
| 1502 return Utils::IsAbsoluteUint(8, offset); // Addressing mode 3. | 1503 return Utils::IsAbsoluteUint(8, offset); // Addressing mode 3. |
| 1503 } | 1504 } |
| 1504 case kStoreByte: | 1505 case kStoreByte: |
| 1505 case kStoreWord: { | 1506 case kStoreWord: { |
| 1506 *offset_mask = 0xfff; | 1507 *offset_mask = 0xfff; |
| 1507 return Utils::IsAbsoluteUint(12, offset); // Addressing mode 2. | 1508 return Utils::IsAbsoluteUint(12, offset); // Addressing mode 2. |
| 1508 } | 1509 } |
| 1509 case kStoreSWord: | 1510 case kStoreSWord: |
| 1510 case kStoreDWord: { | 1511 case kStoreDWord: { |
| 1511 *offset_mask = 0x3ff; | 1512 *offset_mask = 0x3fc; // Multiple of 4. |
| 1512 return Utils::IsAbsoluteUint(10, offset); // VFP addressing mode. | 1513 // VFP addressing mode. |
| 1514 return (Utils::IsAbsoluteUint(10, offset) && Utils::IsAligned(offset, 4)); |
| 1513 } | 1515 } |
| 1514 default: { | 1516 default: { |
| 1515 UNREACHABLE(); | 1517 UNREACHABLE(); |
| 1516 return false; | 1518 return false; |
| 1517 } | 1519 } |
| 1518 } | 1520 } |
| 1519 } | 1521 } |
| 1520 | 1522 |
| 1521 | 1523 |
| 1522 void Assembler::Push(Register rd, Condition cond) { | 1524 void Assembler::Push(Register rd, Condition cond) { |
| 1523 str(rd, Address(SP, -kWordSize, Address::PreIndex), cond); | 1525 str(rd, Address(SP, -kWordSize, Address::PreIndex), cond); |
| 1524 } | 1526 } |
| 1525 | 1527 |
| 1526 | 1528 |
| 1527 void Assembler::Pop(Register rd, Condition cond) { | 1529 void Assembler::Pop(Register rd, Condition cond) { |
| 1528 ldr(rd, Address(SP, kWordSize, Address::PostIndex), cond); | 1530 ldr(rd, Address(SP, kWordSize, Address::PostIndex), cond); |
| 1529 } | 1531 } |
| 1530 | 1532 |
| 1531 | 1533 |
| 1532 void Assembler::PushList(RegList regs, Condition cond) { | 1534 void Assembler::PushList(RegList regs, Condition cond) { |
| 1533 stm(DB_W, SP, regs, cond); | 1535 stm(DB_W, SP, regs, cond); |
| 1534 } | 1536 } |
| 1535 | 1537 |
| 1536 | 1538 |
| 1537 void Assembler::PopList(RegList regs, Condition cond) { | 1539 void Assembler::PopList(RegList regs, Condition cond) { |
| 1538 ldm(IA_W, SP, regs, cond); | 1540 ldm(IA_W, SP, regs, cond); |
| 1539 } | 1541 } |
| 1540 | 1542 |
| 1541 | 1543 |
| 1542 void Assembler::Mov(Register rd, Register rm, Condition cond) { | 1544 void Assembler::MoveRegister(Register rd, Register rm, Condition cond) { |
| 1543 if (rd != rm) { | 1545 if (rd != rm) { |
| 1544 mov(rd, ShifterOperand(rm), cond); | 1546 mov(rd, ShifterOperand(rm), cond); |
| 1545 } | 1547 } |
| 1546 } | 1548 } |
| 1547 | 1549 |
| 1548 | 1550 |
| 1549 void Assembler::Lsl(Register rd, Register rm, uint32_t shift_imm, | 1551 void Assembler::Lsl(Register rd, Register rm, uint32_t shift_imm, |
| 1550 Condition cond) { | 1552 Condition cond) { |
| 1551 ASSERT(shift_imm != 0); // Do not use Lsl if no shift is wanted. | 1553 ASSERT(shift_imm != 0); // Do not use Lsl if no shift is wanted. |
| 1552 mov(rd, ShifterOperand(rm, LSL, shift_imm), cond); | 1554 mov(rd, ShifterOperand(rm, LSL, shift_imm), cond); |
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| 2183 | 2185 |
| 2184 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 2186 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 2185 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 2187 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 2186 return fpu_reg_names[reg]; | 2188 return fpu_reg_names[reg]; |
| 2187 } | 2189 } |
| 2188 | 2190 |
| 2189 } // namespace dart | 2191 } // namespace dart |
| 2190 | 2192 |
| 2191 #endif // defined TARGET_ARCH_ARM | 2193 #endif // defined TARGET_ARCH_ARM |
| 2192 | 2194 |
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