Fix bug in ParallelMoveResolver::EmitSwap: implement swaps of FPU spill slots.

Fix bug in ParallelMoveResolver::EmitSwap: implement swaps of FPU spill slots.

Remove representation from location. Presence of representation in location encoding was violating the invariant that unequal locations must be disjoint (where equality for locations is defined in terms of bitwise equality of their encoding). This could lead ParallelMoveResolver to treat XMM1 containing unboxed double as unequal location to XMM1 containing unboxed mint, which is obviously incorrect.

For similar reason eliminate kFloat32x4StackSlot and kUint32x4StackSlot distinction is eliminated and both are replaced with kQuadStackSlot. Register allocator now guarantees that no kQuadStackSlot occupies the same space as any other kDoubleStackSlot. This also shrinks optimized stack when only doubles are used (but might lead to a higher stack utilization when a mixture of doubles and quads is used).

Implement allocation of scratch Cpu and Xmm registers for ParallelMoveResolver. This also allows to remove push(eax)/pop(eax) pairs when resolving memory-memory cycles on ia32.  

BUG=dart:9710
Committed: https://code.google.com/p/dart/source/detail?r=21148

[Vyacheslav Egorov (Google), 2013-04-08 18:40:25]

+johnmccutchan fyi

[Vyacheslav Egorov (Google), 2013-04-08 18:40:49]

Florian, please take a look.

[Florian Schneider, 2013-04-09 09:44:27]

LGTM.

https://codereview.chromium.org/13801014/diff/2001/runtime/vm/flow_graph_comp...
File runtime/vm/flow_graph_compiler.cc (right):

https://codereview.chromium.org/13801014/diff/2001/runtime/vm/flow_graph_comp...
runtime/vm/flow_graph_compiler.cc:968:
ParallelMoveResolver::ScratchFpuRegisterScope::ScratchFpuRegisterScope(
Can you implement ScratchFpuRegisterScope in using ScratchRegisterScope with
XMM0 blocked?

https://codereview.chromium.org/13801014/diff/2001/runtime/vm/flow_graph_comp...
File runtime/vm/flow_graph_compiler.h (right):

https://codereview.chromium.org/13801014/diff/2001/runtime/vm/flow_graph_comp...
runtime/vm/flow_graph_compiler.h:47: class ScratchRegisterScope : public
ValueObject {
Would one class instead of two almost identical classes do here?

[Vyacheslav Egorov (Google), 2013-04-09 11:16:54]

Thanks for the review.

I tried removing duplication but it gets too messy because there are too many
parameters (type of the location, maximum number of registers, etc).

[Vyacheslav Egorov (Google), 2013-04-09 12:06:06]

Florian, PTAL I made ARM/MIPS compile and shared more code between Cpu/Fpu
scratch scopes.

+regis, zra: FYI, this CL contains changes to ARM&MIPS.

[Florian Schneider, 2013-04-09 12:12:18]

lgtm

[Vyacheslav Egorov (Google), 2013-04-09 12:24:12]

Committed patchset #4 manually as r21148 (presubmit successful).

[regis, 2013-04-09 15:29:27]

ARM/MIPS LGTM with comments.

https://codereview.chromium.org/13801014/diff/17001/runtime/vm/flow_graph_com...
File runtime/vm/flow_graph_compiler_arm.cc (right):

https://codereview.chromium.org/13801014/diff/17001/runtime/vm/flow_graph_com...
runtime/vm/flow_graph_compiler_arm.cc:1274: ScratchRegisterScope
ensure_scratch(this, IP);
IP is not an available register, so there is no need to pass it here as blocked
register.
I noticed that some architecture independent code assumes that the range of
available registers starts with register 0, which is not the case on MIPS. That
should be easy for us to fix that.