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Unified Diff: src/mips/simulator-mips.cc

Issue 888005: Fix issues with compiling V8 with LLVM Clang... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 9 months ago
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Index: src/mips/simulator-mips.cc
===================================================================
--- src/mips/simulator-mips.cc (revision 4110)
+++ src/mips/simulator-mips.cc (working copy)
@@ -31,7 +31,7 @@
#include "disasm.h"
#include "assembler.h"
-#include "globals.h" // Need the bit_cast
+#include "globals.h" // Need the BitCast
#include "mips/constants-mips.h"
#include "mips/simulator-mips.h"
@@ -604,7 +604,7 @@
void Simulator::set_fpu_register_double(int fpureg, double value) {
ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters) && ((fpureg % 2) == 0));
- *v8i::bit_cast<double*, int32_t*>(&FPUregisters_[fpureg]) = value;
+ *v8i::BitCast<double*, int32_t*>(&FPUregisters_[fpureg]) = value;
}
@@ -625,7 +625,7 @@
double Simulator::get_fpu_register_double(int fpureg) const {
ASSERT((fpureg >= 0) && (fpureg < kNumFPURegisters) && ((fpureg % 2) == 0));
- return *v8i::bit_cast<double*, int32_t*>(
+ return *v8i::BitCast<double*, int32_t*>(
const_cast<int32_t*>(&FPUregisters_[fpureg]));
}
@@ -901,7 +901,7 @@
break;
case MFHC1:
fp_out = get_fpu_register_double(fs_reg);
- alu_out = *v8i::bit_cast<int32_t*, double*>(&fp_out);
+ alu_out = *v8i::BitCast<int32_t*, double*>(&fp_out);
break;
case MTC1:
case MTHC1:
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