| Index: src/ia32/assembler-ia32.h
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| ===================================================================
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| --- src/ia32/assembler-ia32.h	(revision 9531)
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| +++ src/ia32/assembler-ia32.h	(working copy)
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| @@ -75,6 +75,8 @@
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|    static inline Register FromAllocationIndex(int index);
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|  
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|    static Register from_code(int code) {
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| +    ASSERT(code >= 0);
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| +    ASSERT(code < kNumRegisters);
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|      Register r = { code };
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|      return r;
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|    }
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| @@ -300,9 +302,6 @@
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|  
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|  class Operand BASE_EMBEDDED {
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|   public:
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| -  // reg
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| -  INLINE(explicit Operand(Register reg));
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| -
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|    // XMM reg
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|    INLINE(explicit Operand(XMMRegister xmm_reg));
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|  
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| @@ -347,12 +346,16 @@
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|    // Returns true if this Operand is a wrapper for the specified register.
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|    bool is_reg(Register reg) const;
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|  
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| +  // Returns true if this Operand is a wrapper for one register.
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| +  bool is_reg_only() const;
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| +
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| +  // Asserts that this Operand is a wrapper for one register and returns the
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| +  // register.
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| +  Register reg() const;
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| +
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|   private:
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| -  byte buf_[6];
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| -  // The number of bytes in buf_.
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| -  unsigned int len_;
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| -  // Only valid if len_ > 4.
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| -  RelocInfo::Mode rmode_;
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| +  // reg
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| +  INLINE(explicit Operand(Register reg));
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|  
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|    // Set the ModRM byte without an encoded 'reg' register. The
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|    // register is encoded later as part of the emit_operand operation.
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| @@ -362,7 +365,15 @@
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|    inline void set_disp8(int8_t disp);
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|    inline void set_dispr(int32_t disp, RelocInfo::Mode rmode);
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|  
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| +  byte buf_[6];
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| +  // The number of bytes in buf_.
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| +  unsigned int len_;
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| +  // Only valid if len_ > 4.
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| +  RelocInfo::Mode rmode_;
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| +
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|    friend class Assembler;
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| +  friend class MacroAssembler;
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| +  friend class LCodeGen;
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|  };
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|  
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|  
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| @@ -671,7 +682,9 @@
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|    void leave();
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|  
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|    // Moves
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| +  void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); }
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|    void mov_b(Register dst, const Operand& src);
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| +  void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); }
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|    void mov_b(const Operand& dst, int8_t imm8);
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|    void mov_b(const Operand& dst, Register src);
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|  
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| @@ -687,17 +700,24 @@
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|    void mov(const Operand& dst, Handle<Object> handle);
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|    void mov(const Operand& dst, Register src);
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|  
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| +  void movsx_b(Register dst, Register src) { movsx_b(dst, Operand(src)); }
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|    void movsx_b(Register dst, const Operand& src);
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|  
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| +  void movsx_w(Register dst, Register src) { movsx_w(dst, Operand(src)); }
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|    void movsx_w(Register dst, const Operand& src);
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|  
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| +  void movzx_b(Register dst, Register src) { movzx_b(dst, Operand(src)); }
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|    void movzx_b(Register dst, const Operand& src);
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|  
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| +  void movzx_w(Register dst, Register src) { movzx_w(dst, Operand(src)); }
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|    void movzx_w(Register dst, const Operand& src);
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|  
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|    // Conditional moves
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|    void cmov(Condition cc, Register dst, int32_t imm32);
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|    void cmov(Condition cc, Register dst, Handle<Object> handle);
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| +  void cmov(Condition cc, Register dst, Register src) {
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| +    cmov(cc, dst, Operand(src));
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| +  }
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|    void cmov(Condition cc, Register dst, const Operand& src);
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|  
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|    // Flag management.
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| @@ -715,24 +735,31 @@
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|    void adc(Register dst, int32_t imm32);
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|    void adc(Register dst, const Operand& src);
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|  
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| +  void add(Register dst, Register src) { add(dst, Operand(src)); }
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|    void add(Register dst, const Operand& src);
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| +  void add(const Operand& dst, Register src);
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| +  void add(Register dst, const Immediate& imm) { add(Operand(dst), imm); }
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|    void add(const Operand& dst, const Immediate& x);
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|  
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|    void and_(Register dst, int32_t imm32);
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|    void and_(Register dst, const Immediate& x);
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| +  void and_(Register dst, Register src) { and_(dst, Operand(src)); }
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|    void and_(Register dst, const Operand& src);
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| -  void and_(const Operand& src, Register dst);
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| +  void and_(const Operand& dst, Register src);
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|    void and_(const Operand& dst, const Immediate& x);
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|  
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| +  void cmpb(Register reg, int8_t imm8) { cmpb(Operand(reg), imm8); }
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|    void cmpb(const Operand& op, int8_t imm8);
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| -  void cmpb(Register src, const Operand& dst);
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| -  void cmpb(const Operand& dst, Register src);
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| +  void cmpb(Register reg, const Operand& op);
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| +  void cmpb(const Operand& op, Register reg);
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|    void cmpb_al(const Operand& op);
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|    void cmpw_ax(const Operand& op);
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|    void cmpw(const Operand& op, Immediate imm16);
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|    void cmp(Register reg, int32_t imm32);
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|    void cmp(Register reg, Handle<Object> handle);
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| +  void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); }
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|    void cmp(Register reg, const Operand& op);
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| +  void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); }
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|    void cmp(const Operand& op, const Immediate& imm);
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|    void cmp(const Operand& op, Handle<Object> handle);
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|  
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| @@ -748,6 +775,7 @@
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|  
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|    // Signed multiply instructions.
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|    void imul(Register src);                               // edx:eax = eax * src.
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| +  void imul(Register dst, Register src) { imul(dst, Operand(src)); }
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|    void imul(Register dst, const Operand& src);           // dst = dst * src.
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|    void imul(Register dst, Register src, int32_t imm32);  // dst = src * imm32.
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|  
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| @@ -764,8 +792,10 @@
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|    void not_(Register dst);
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|  
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|    void or_(Register dst, int32_t imm32);
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| +  void or_(Register dst, Register src) { or_(dst, Operand(src)); }
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|    void or_(Register dst, const Operand& src);
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|    void or_(const Operand& dst, Register src);
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| +  void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); }
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|    void or_(const Operand& dst, const Immediate& x);
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|  
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|    void rcl(Register dst, uint8_t imm8);
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| @@ -776,35 +806,42 @@
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|  
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|    void sbb(Register dst, const Operand& src);
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|  
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| +  void shld(Register dst, Register src) { shld(dst, Operand(src)); }
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|    void shld(Register dst, const Operand& src);
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|  
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|    void shl(Register dst, uint8_t imm8);
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|    void shl_cl(Register dst);
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|  
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| +  void shrd(Register dst, Register src) { shrd(dst, Operand(src)); }
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|    void shrd(Register dst, const Operand& src);
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|  
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|    void shr(Register dst, uint8_t imm8);
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|    void shr_cl(Register dst);
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|  
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| -  void subb(const Operand& dst, int8_t imm8);
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| -  void subb(Register dst, const Operand& src);
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| +  void sub(Register dst, const Immediate& imm) { sub(Operand(dst), imm); }
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|    void sub(const Operand& dst, const Immediate& x);
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| +  void sub(Register dst, Register src) { sub(dst, Operand(src)); }
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|    void sub(Register dst, const Operand& src);
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|    void sub(const Operand& dst, Register src);
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|  
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|    void test(Register reg, const Immediate& imm);
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| +  void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); }
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|    void test(Register reg, const Operand& op);
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|    void test_b(Register reg, const Operand& op);
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|    void test(const Operand& op, const Immediate& imm);
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| +  void test_b(Register reg, uint8_t imm8) { test_b(Operand(reg), imm8); }
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|    void test_b(const Operand& op, uint8_t imm8);
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|  
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|    void xor_(Register dst, int32_t imm32);
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| +  void xor_(Register dst, Register src) { xor_(dst, Operand(src)); }
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|    void xor_(Register dst, const Operand& src);
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| -  void xor_(const Operand& src, Register dst);
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| +  void xor_(const Operand& dst, Register src);
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| +  void xor_(Register dst, const Immediate& imm) { xor_(Operand(dst), imm); }
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|    void xor_(const Operand& dst, const Immediate& x);
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|  
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|    // Bit operations.
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|    void bt(const Operand& dst, Register src);
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| +  void bts(Register dst, Register src) { bts(Operand(dst), src); }
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|    void bts(const Operand& dst, Register src);
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|  
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|    // Miscellaneous
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| @@ -835,6 +872,7 @@
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|    void call(Label* L);
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|    void call(byte* entry, RelocInfo::Mode rmode);
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|    int CallSize(const Operand& adr);
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| +  void call(Register reg) { call(Operand(reg)); }
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|    void call(const Operand& adr);
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|    int CallSize(Handle<Code> code, RelocInfo::Mode mode);
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|    void call(Handle<Code> code,
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| @@ -845,6 +883,7 @@
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|    // unconditional jump to L
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|    void jmp(Label* L, Label::Distance distance = Label::kFar);
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|    void jmp(byte* entry, RelocInfo::Mode rmode);
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| +  void jmp(Register reg) { jmp(Operand(reg)); }
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|    void jmp(const Operand& adr);
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|    void jmp(Handle<Code> code, RelocInfo::Mode rmode);
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|  
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| @@ -929,6 +968,7 @@
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|    void cvttss2si(Register dst, const Operand& src);
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|    void cvttsd2si(Register dst, const Operand& src);
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|  
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| +  void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); }
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|    void cvtsi2sd(XMMRegister dst, const Operand& src);
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|    void cvtss2sd(XMMRegister dst, XMMRegister src);
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|    void cvtsd2ss(XMMRegister dst, XMMRegister src);
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| @@ -969,12 +1009,14 @@
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|    void movdbl(XMMRegister dst, const Operand& src);
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|    void movdbl(const Operand& dst, XMMRegister src);
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|  
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| +  void movd(XMMRegister dst, Register src) { movd(dst, Operand(src)); }
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|    void movd(XMMRegister dst, const Operand& src);
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| -  void movd(const Operand& src, XMMRegister dst);
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| +  void movd(Register dst, XMMRegister src) { movd(Operand(dst), src); }
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| +  void movd(const Operand& dst, XMMRegister src);
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|    void movsd(XMMRegister dst, XMMRegister src);
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|  
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|    void movss(XMMRegister dst, const Operand& src);
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| -  void movss(const Operand& src, XMMRegister dst);
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| +  void movss(const Operand& dst, XMMRegister src);
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|    void movss(XMMRegister dst, XMMRegister src);
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|  
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|    void pand(XMMRegister dst, XMMRegister src);
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| @@ -987,11 +1029,17 @@
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|    void psrlq(XMMRegister reg, int8_t shift);
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|    void psrlq(XMMRegister dst, XMMRegister src);
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|    void pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle);
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| +  void pextrd(Register dst, XMMRegister src, int8_t offset) {
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| +    pextrd(Operand(dst), src, offset);
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| +  }
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|    void pextrd(const Operand& dst, XMMRegister src, int8_t offset);
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| +  void pinsrd(XMMRegister dst, Register src, int8_t offset) {
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| +    pinsrd(dst, Operand(src), offset);
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| +  }
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|    void pinsrd(XMMRegister dst, const Operand& src, int8_t offset);
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|  
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|    // Parallel XMM operations.
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| -  void movntdqa(XMMRegister src, const Operand& dst);
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| +  void movntdqa(XMMRegister dst, const Operand& src);
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|    void movntdq(const Operand& dst, XMMRegister src);
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|    // Prefetch src position into cache level.
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|    // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a
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| @@ -1045,6 +1093,9 @@
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|    static const int kMaximalBufferSize = 512*MB;
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|    static const int kMinimalBufferSize = 4*KB;
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|  
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| +  byte byte_at(int pos)  { return buffer_[pos]; }
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| +  void set_byte_at(int pos, byte value) { buffer_[pos] = value; }
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| +
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|   protected:
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|    bool emit_debug_code() const { return emit_debug_code_; }
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|  
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| @@ -1057,9 +1108,8 @@
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|  
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|    byte* addr_at(int pos) { return buffer_ + pos; }
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|  
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| +
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|   private:
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| -  byte byte_at(int pos)  { return buffer_[pos]; }
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| -  void set_byte_at(int pos, byte value) { buffer_[pos] = value; }
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|    uint32_t long_at(int pos)  {
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|      return *reinterpret_cast<uint32_t*>(addr_at(pos));
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|    }
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| 
 |