OLD | NEW |
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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68 static const int kNumAllocatableRegisters = 6; | 68 static const int kNumAllocatableRegisters = 6; |
69 static const int kNumRegisters = 8; | 69 static const int kNumRegisters = 8; |
70 | 70 |
71 static inline const char* AllocationIndexToString(int index); | 71 static inline const char* AllocationIndexToString(int index); |
72 | 72 |
73 static inline int ToAllocationIndex(Register reg); | 73 static inline int ToAllocationIndex(Register reg); |
74 | 74 |
75 static inline Register FromAllocationIndex(int index); | 75 static inline Register FromAllocationIndex(int index); |
76 | 76 |
77 static Register from_code(int code) { | 77 static Register from_code(int code) { |
| 78 ASSERT(code >= 0); |
| 79 ASSERT(code < kNumRegisters); |
78 Register r = { code }; | 80 Register r = { code }; |
79 return r; | 81 return r; |
80 } | 82 } |
81 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } | 83 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } |
82 bool is(Register reg) const { return code_ == reg.code_; } | 84 bool is(Register reg) const { return code_ == reg.code_; } |
83 // eax, ebx, ecx and edx are byte registers, the rest are not. | 85 // eax, ebx, ecx and edx are byte registers, the rest are not. |
84 bool is_byte_register() const { return code_ <= 3; } | 86 bool is_byte_register() const { return code_ <= 3; } |
85 int code() const { | 87 int code() const { |
86 ASSERT(is_valid()); | 88 ASSERT(is_valid()); |
87 return code_; | 89 return code_; |
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293 times_8 = 3, | 295 times_8 = 3, |
294 times_int_size = times_4, | 296 times_int_size = times_4, |
295 times_half_pointer_size = times_2, | 297 times_half_pointer_size = times_2, |
296 times_pointer_size = times_4, | 298 times_pointer_size = times_4, |
297 times_twice_pointer_size = times_8 | 299 times_twice_pointer_size = times_8 |
298 }; | 300 }; |
299 | 301 |
300 | 302 |
301 class Operand BASE_EMBEDDED { | 303 class Operand BASE_EMBEDDED { |
302 public: | 304 public: |
303 // reg | |
304 INLINE(explicit Operand(Register reg)); | |
305 | |
306 // XMM reg | 305 // XMM reg |
307 INLINE(explicit Operand(XMMRegister xmm_reg)); | 306 INLINE(explicit Operand(XMMRegister xmm_reg)); |
308 | 307 |
309 // [disp/r] | 308 // [disp/r] |
310 INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode)); | 309 INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode)); |
311 // disp only must always be relocated | 310 // disp only must always be relocated |
312 | 311 |
313 // [base + disp/r] | 312 // [base + disp/r] |
314 explicit Operand(Register base, int32_t disp, | 313 explicit Operand(Register base, int32_t disp, |
315 RelocInfo::Mode rmode = RelocInfo::NONE); | 314 RelocInfo::Mode rmode = RelocInfo::NONE); |
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340 } | 339 } |
341 | 340 |
342 static Operand Cell(Handle<JSGlobalPropertyCell> cell) { | 341 static Operand Cell(Handle<JSGlobalPropertyCell> cell) { |
343 return Operand(reinterpret_cast<int32_t>(cell.location()), | 342 return Operand(reinterpret_cast<int32_t>(cell.location()), |
344 RelocInfo::GLOBAL_PROPERTY_CELL); | 343 RelocInfo::GLOBAL_PROPERTY_CELL); |
345 } | 344 } |
346 | 345 |
347 // Returns true if this Operand is a wrapper for the specified register. | 346 // Returns true if this Operand is a wrapper for the specified register. |
348 bool is_reg(Register reg) const; | 347 bool is_reg(Register reg) const; |
349 | 348 |
| 349 // Returns true if this Operand is a wrapper for one register. |
| 350 bool is_reg_only() const; |
| 351 |
| 352 // Asserts that this Operand is a wrapper for one register and returns the |
| 353 // register. |
| 354 Register reg() const; |
| 355 |
350 private: | 356 private: |
351 byte buf_[6]; | 357 // reg |
352 // The number of bytes in buf_. | 358 INLINE(explicit Operand(Register reg)); |
353 unsigned int len_; | |
354 // Only valid if len_ > 4. | |
355 RelocInfo::Mode rmode_; | |
356 | 359 |
357 // Set the ModRM byte without an encoded 'reg' register. The | 360 // Set the ModRM byte without an encoded 'reg' register. The |
358 // register is encoded later as part of the emit_operand operation. | 361 // register is encoded later as part of the emit_operand operation. |
359 inline void set_modrm(int mod, Register rm); | 362 inline void set_modrm(int mod, Register rm); |
360 | 363 |
361 inline void set_sib(ScaleFactor scale, Register index, Register base); | 364 inline void set_sib(ScaleFactor scale, Register index, Register base); |
362 inline void set_disp8(int8_t disp); | 365 inline void set_disp8(int8_t disp); |
363 inline void set_dispr(int32_t disp, RelocInfo::Mode rmode); | 366 inline void set_dispr(int32_t disp, RelocInfo::Mode rmode); |
364 | 367 |
| 368 byte buf_[6]; |
| 369 // The number of bytes in buf_. |
| 370 unsigned int len_; |
| 371 // Only valid if len_ > 4. |
| 372 RelocInfo::Mode rmode_; |
| 373 |
365 friend class Assembler; | 374 friend class Assembler; |
| 375 friend class MacroAssembler; |
| 376 friend class LCodeGen; |
366 }; | 377 }; |
367 | 378 |
368 | 379 |
369 // ----------------------------------------------------------------------------- | 380 // ----------------------------------------------------------------------------- |
370 // A Displacement describes the 32bit immediate field of an instruction which | 381 // A Displacement describes the 32bit immediate field of an instruction which |
371 // may be used together with a Label in order to refer to a yet unknown code | 382 // may be used together with a Label in order to refer to a yet unknown code |
372 // position. Displacements stored in the instruction stream are used to describe | 383 // position. Displacements stored in the instruction stream are used to describe |
373 // the instruction and to chain a list of instructions using the same Label. | 384 // the instruction and to chain a list of instructions using the same Label. |
374 // A Displacement contains 2 different fields: | 385 // A Displacement contains 2 different fields: |
375 // | 386 // |
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664 void push(const Operand& src); | 675 void push(const Operand& src); |
665 void push(Handle<Object> handle); | 676 void push(Handle<Object> handle); |
666 | 677 |
667 void pop(Register dst); | 678 void pop(Register dst); |
668 void pop(const Operand& dst); | 679 void pop(const Operand& dst); |
669 | 680 |
670 void enter(const Immediate& size); | 681 void enter(const Immediate& size); |
671 void leave(); | 682 void leave(); |
672 | 683 |
673 // Moves | 684 // Moves |
| 685 void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); } |
674 void mov_b(Register dst, const Operand& src); | 686 void mov_b(Register dst, const Operand& src); |
| 687 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } |
675 void mov_b(const Operand& dst, int8_t imm8); | 688 void mov_b(const Operand& dst, int8_t imm8); |
676 void mov_b(const Operand& dst, Register src); | 689 void mov_b(const Operand& dst, Register src); |
677 | 690 |
678 void mov_w(Register dst, const Operand& src); | 691 void mov_w(Register dst, const Operand& src); |
679 void mov_w(const Operand& dst, Register src); | 692 void mov_w(const Operand& dst, Register src); |
680 | 693 |
681 void mov(Register dst, int32_t imm32); | 694 void mov(Register dst, int32_t imm32); |
682 void mov(Register dst, const Immediate& x); | 695 void mov(Register dst, const Immediate& x); |
683 void mov(Register dst, Handle<Object> handle); | 696 void mov(Register dst, Handle<Object> handle); |
684 void mov(Register dst, const Operand& src); | 697 void mov(Register dst, const Operand& src); |
685 void mov(Register dst, Register src); | 698 void mov(Register dst, Register src); |
686 void mov(const Operand& dst, const Immediate& x); | 699 void mov(const Operand& dst, const Immediate& x); |
687 void mov(const Operand& dst, Handle<Object> handle); | 700 void mov(const Operand& dst, Handle<Object> handle); |
688 void mov(const Operand& dst, Register src); | 701 void mov(const Operand& dst, Register src); |
689 | 702 |
| 703 void movsx_b(Register dst, Register src) { movsx_b(dst, Operand(src)); } |
690 void movsx_b(Register dst, const Operand& src); | 704 void movsx_b(Register dst, const Operand& src); |
691 | 705 |
| 706 void movsx_w(Register dst, Register src) { movsx_w(dst, Operand(src)); } |
692 void movsx_w(Register dst, const Operand& src); | 707 void movsx_w(Register dst, const Operand& src); |
693 | 708 |
| 709 void movzx_b(Register dst, Register src) { movzx_b(dst, Operand(src)); } |
694 void movzx_b(Register dst, const Operand& src); | 710 void movzx_b(Register dst, const Operand& src); |
695 | 711 |
| 712 void movzx_w(Register dst, Register src) { movzx_w(dst, Operand(src)); } |
696 void movzx_w(Register dst, const Operand& src); | 713 void movzx_w(Register dst, const Operand& src); |
697 | 714 |
698 // Conditional moves | 715 // Conditional moves |
699 void cmov(Condition cc, Register dst, int32_t imm32); | 716 void cmov(Condition cc, Register dst, int32_t imm32); |
700 void cmov(Condition cc, Register dst, Handle<Object> handle); | 717 void cmov(Condition cc, Register dst, Handle<Object> handle); |
| 718 void cmov(Condition cc, Register dst, Register src) { |
| 719 cmov(cc, dst, Operand(src)); |
| 720 } |
701 void cmov(Condition cc, Register dst, const Operand& src); | 721 void cmov(Condition cc, Register dst, const Operand& src); |
702 | 722 |
703 // Flag management. | 723 // Flag management. |
704 void cld(); | 724 void cld(); |
705 | 725 |
706 // Repetitive string instructions. | 726 // Repetitive string instructions. |
707 void rep_movs(); | 727 void rep_movs(); |
708 void rep_stos(); | 728 void rep_stos(); |
709 void stos(); | 729 void stos(); |
710 | 730 |
711 // Exchange two registers | 731 // Exchange two registers |
712 void xchg(Register dst, Register src); | 732 void xchg(Register dst, Register src); |
713 | 733 |
714 // Arithmetics | 734 // Arithmetics |
715 void adc(Register dst, int32_t imm32); | 735 void adc(Register dst, int32_t imm32); |
716 void adc(Register dst, const Operand& src); | 736 void adc(Register dst, const Operand& src); |
717 | 737 |
| 738 void add(Register dst, Register src) { add(dst, Operand(src)); } |
718 void add(Register dst, const Operand& src); | 739 void add(Register dst, const Operand& src); |
| 740 void add(const Operand& dst, Register src); |
| 741 void add(Register dst, const Immediate& imm) { add(Operand(dst), imm); } |
719 void add(const Operand& dst, const Immediate& x); | 742 void add(const Operand& dst, const Immediate& x); |
720 | 743 |
721 void and_(Register dst, int32_t imm32); | 744 void and_(Register dst, int32_t imm32); |
722 void and_(Register dst, const Immediate& x); | 745 void and_(Register dst, const Immediate& x); |
| 746 void and_(Register dst, Register src) { and_(dst, Operand(src)); } |
723 void and_(Register dst, const Operand& src); | 747 void and_(Register dst, const Operand& src); |
724 void and_(const Operand& src, Register dst); | 748 void and_(const Operand& dst, Register src); |
725 void and_(const Operand& dst, const Immediate& x); | 749 void and_(const Operand& dst, const Immediate& x); |
726 | 750 |
| 751 void cmpb(Register reg, int8_t imm8) { cmpb(Operand(reg), imm8); } |
727 void cmpb(const Operand& op, int8_t imm8); | 752 void cmpb(const Operand& op, int8_t imm8); |
728 void cmpb(Register src, const Operand& dst); | 753 void cmpb(Register reg, const Operand& op); |
729 void cmpb(const Operand& dst, Register src); | 754 void cmpb(const Operand& op, Register reg); |
730 void cmpb_al(const Operand& op); | 755 void cmpb_al(const Operand& op); |
731 void cmpw_ax(const Operand& op); | 756 void cmpw_ax(const Operand& op); |
732 void cmpw(const Operand& op, Immediate imm16); | 757 void cmpw(const Operand& op, Immediate imm16); |
733 void cmp(Register reg, int32_t imm32); | 758 void cmp(Register reg, int32_t imm32); |
734 void cmp(Register reg, Handle<Object> handle); | 759 void cmp(Register reg, Handle<Object> handle); |
| 760 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } |
735 void cmp(Register reg, const Operand& op); | 761 void cmp(Register reg, const Operand& op); |
| 762 void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); } |
736 void cmp(const Operand& op, const Immediate& imm); | 763 void cmp(const Operand& op, const Immediate& imm); |
737 void cmp(const Operand& op, Handle<Object> handle); | 764 void cmp(const Operand& op, Handle<Object> handle); |
738 | 765 |
739 void dec_b(Register dst); | 766 void dec_b(Register dst); |
740 void dec_b(const Operand& dst); | 767 void dec_b(const Operand& dst); |
741 | 768 |
742 void dec(Register dst); | 769 void dec(Register dst); |
743 void dec(const Operand& dst); | 770 void dec(const Operand& dst); |
744 | 771 |
745 void cdq(); | 772 void cdq(); |
746 | 773 |
747 void idiv(Register src); | 774 void idiv(Register src); |
748 | 775 |
749 // Signed multiply instructions. | 776 // Signed multiply instructions. |
750 void imul(Register src); // edx:eax = eax * src. | 777 void imul(Register src); // edx:eax = eax * src. |
| 778 void imul(Register dst, Register src) { imul(dst, Operand(src)); } |
751 void imul(Register dst, const Operand& src); // dst = dst * src. | 779 void imul(Register dst, const Operand& src); // dst = dst * src. |
752 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32. | 780 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32. |
753 | 781 |
754 void inc(Register dst); | 782 void inc(Register dst); |
755 void inc(const Operand& dst); | 783 void inc(const Operand& dst); |
756 | 784 |
757 void lea(Register dst, const Operand& src); | 785 void lea(Register dst, const Operand& src); |
758 | 786 |
759 // Unsigned multiply instruction. | 787 // Unsigned multiply instruction. |
760 void mul(Register src); // edx:eax = eax * reg. | 788 void mul(Register src); // edx:eax = eax * reg. |
761 | 789 |
762 void neg(Register dst); | 790 void neg(Register dst); |
763 | 791 |
764 void not_(Register dst); | 792 void not_(Register dst); |
765 | 793 |
766 void or_(Register dst, int32_t imm32); | 794 void or_(Register dst, int32_t imm32); |
| 795 void or_(Register dst, Register src) { or_(dst, Operand(src)); } |
767 void or_(Register dst, const Operand& src); | 796 void or_(Register dst, const Operand& src); |
768 void or_(const Operand& dst, Register src); | 797 void or_(const Operand& dst, Register src); |
| 798 void or_(Register dst, const Immediate& imm) { or_(Operand(dst), imm); } |
769 void or_(const Operand& dst, const Immediate& x); | 799 void or_(const Operand& dst, const Immediate& x); |
770 | 800 |
771 void rcl(Register dst, uint8_t imm8); | 801 void rcl(Register dst, uint8_t imm8); |
772 void rcr(Register dst, uint8_t imm8); | 802 void rcr(Register dst, uint8_t imm8); |
773 | 803 |
774 void sar(Register dst, uint8_t imm8); | 804 void sar(Register dst, uint8_t imm8); |
775 void sar_cl(Register dst); | 805 void sar_cl(Register dst); |
776 | 806 |
777 void sbb(Register dst, const Operand& src); | 807 void sbb(Register dst, const Operand& src); |
778 | 808 |
| 809 void shld(Register dst, Register src) { shld(dst, Operand(src)); } |
779 void shld(Register dst, const Operand& src); | 810 void shld(Register dst, const Operand& src); |
780 | 811 |
781 void shl(Register dst, uint8_t imm8); | 812 void shl(Register dst, uint8_t imm8); |
782 void shl_cl(Register dst); | 813 void shl_cl(Register dst); |
783 | 814 |
| 815 void shrd(Register dst, Register src) { shrd(dst, Operand(src)); } |
784 void shrd(Register dst, const Operand& src); | 816 void shrd(Register dst, const Operand& src); |
785 | 817 |
786 void shr(Register dst, uint8_t imm8); | 818 void shr(Register dst, uint8_t imm8); |
787 void shr_cl(Register dst); | 819 void shr_cl(Register dst); |
788 | 820 |
789 void subb(const Operand& dst, int8_t imm8); | 821 void sub(Register dst, const Immediate& imm) { sub(Operand(dst), imm); } |
790 void subb(Register dst, const Operand& src); | |
791 void sub(const Operand& dst, const Immediate& x); | 822 void sub(const Operand& dst, const Immediate& x); |
| 823 void sub(Register dst, Register src) { sub(dst, Operand(src)); } |
792 void sub(Register dst, const Operand& src); | 824 void sub(Register dst, const Operand& src); |
793 void sub(const Operand& dst, Register src); | 825 void sub(const Operand& dst, Register src); |
794 | 826 |
795 void test(Register reg, const Immediate& imm); | 827 void test(Register reg, const Immediate& imm); |
| 828 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } |
796 void test(Register reg, const Operand& op); | 829 void test(Register reg, const Operand& op); |
797 void test_b(Register reg, const Operand& op); | 830 void test_b(Register reg, const Operand& op); |
798 void test(const Operand& op, const Immediate& imm); | 831 void test(const Operand& op, const Immediate& imm); |
| 832 void test_b(Register reg, uint8_t imm8) { test_b(Operand(reg), imm8); } |
799 void test_b(const Operand& op, uint8_t imm8); | 833 void test_b(const Operand& op, uint8_t imm8); |
800 | 834 |
801 void xor_(Register dst, int32_t imm32); | 835 void xor_(Register dst, int32_t imm32); |
| 836 void xor_(Register dst, Register src) { xor_(dst, Operand(src)); } |
802 void xor_(Register dst, const Operand& src); | 837 void xor_(Register dst, const Operand& src); |
803 void xor_(const Operand& src, Register dst); | 838 void xor_(const Operand& dst, Register src); |
| 839 void xor_(Register dst, const Immediate& imm) { xor_(Operand(dst), imm); } |
804 void xor_(const Operand& dst, const Immediate& x); | 840 void xor_(const Operand& dst, const Immediate& x); |
805 | 841 |
806 // Bit operations. | 842 // Bit operations. |
807 void bt(const Operand& dst, Register src); | 843 void bt(const Operand& dst, Register src); |
| 844 void bts(Register dst, Register src) { bts(Operand(dst), src); } |
808 void bts(const Operand& dst, Register src); | 845 void bts(const Operand& dst, Register src); |
809 | 846 |
810 // Miscellaneous | 847 // Miscellaneous |
811 void hlt(); | 848 void hlt(); |
812 void int3(); | 849 void int3(); |
813 void nop(); | 850 void nop(); |
814 void rdtsc(); | 851 void rdtsc(); |
815 void ret(int imm16); | 852 void ret(int imm16); |
816 | 853 |
817 // Label operations & relative jumps (PPUM Appendix D) | 854 // Label operations & relative jumps (PPUM Appendix D) |
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828 // | 865 // |
829 // Note: The same Label can be used for forward and backward branches | 866 // Note: The same Label can be used for forward and backward branches |
830 // but it may be bound only once. | 867 // but it may be bound only once. |
831 | 868 |
832 void bind(Label* L); // binds an unbound label L to the current code position | 869 void bind(Label* L); // binds an unbound label L to the current code position |
833 | 870 |
834 // Calls | 871 // Calls |
835 void call(Label* L); | 872 void call(Label* L); |
836 void call(byte* entry, RelocInfo::Mode rmode); | 873 void call(byte* entry, RelocInfo::Mode rmode); |
837 int CallSize(const Operand& adr); | 874 int CallSize(const Operand& adr); |
| 875 void call(Register reg) { call(Operand(reg)); } |
838 void call(const Operand& adr); | 876 void call(const Operand& adr); |
839 int CallSize(Handle<Code> code, RelocInfo::Mode mode); | 877 int CallSize(Handle<Code> code, RelocInfo::Mode mode); |
840 void call(Handle<Code> code, | 878 void call(Handle<Code> code, |
841 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, | 879 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET, |
842 unsigned ast_id = kNoASTId); | 880 unsigned ast_id = kNoASTId); |
843 | 881 |
844 // Jumps | 882 // Jumps |
845 // unconditional jump to L | 883 // unconditional jump to L |
846 void jmp(Label* L, Label::Distance distance = Label::kFar); | 884 void jmp(Label* L, Label::Distance distance = Label::kFar); |
847 void jmp(byte* entry, RelocInfo::Mode rmode); | 885 void jmp(byte* entry, RelocInfo::Mode rmode); |
| 886 void jmp(Register reg) { jmp(Operand(reg)); } |
848 void jmp(const Operand& adr); | 887 void jmp(const Operand& adr); |
849 void jmp(Handle<Code> code, RelocInfo::Mode rmode); | 888 void jmp(Handle<Code> code, RelocInfo::Mode rmode); |
850 | 889 |
851 // Conditional jumps | 890 // Conditional jumps |
852 void j(Condition cc, | 891 void j(Condition cc, |
853 Label* L, | 892 Label* L, |
854 Label::Distance distance = Label::kFar); | 893 Label::Distance distance = Label::kFar); |
855 void j(Condition cc, byte* entry, RelocInfo::Mode rmode); | 894 void j(Condition cc, byte* entry, RelocInfo::Mode rmode); |
856 void j(Condition cc, Handle<Code> code); | 895 void j(Condition cc, Handle<Code> code); |
857 | 896 |
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922 | 961 |
923 void sahf(); | 962 void sahf(); |
924 void setcc(Condition cc, Register reg); | 963 void setcc(Condition cc, Register reg); |
925 | 964 |
926 void cpuid(); | 965 void cpuid(); |
927 | 966 |
928 // SSE2 instructions | 967 // SSE2 instructions |
929 void cvttss2si(Register dst, const Operand& src); | 968 void cvttss2si(Register dst, const Operand& src); |
930 void cvttsd2si(Register dst, const Operand& src); | 969 void cvttsd2si(Register dst, const Operand& src); |
931 | 970 |
| 971 void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); } |
932 void cvtsi2sd(XMMRegister dst, const Operand& src); | 972 void cvtsi2sd(XMMRegister dst, const Operand& src); |
933 void cvtss2sd(XMMRegister dst, XMMRegister src); | 973 void cvtss2sd(XMMRegister dst, XMMRegister src); |
934 void cvtsd2ss(XMMRegister dst, XMMRegister src); | 974 void cvtsd2ss(XMMRegister dst, XMMRegister src); |
935 | 975 |
936 void addsd(XMMRegister dst, XMMRegister src); | 976 void addsd(XMMRegister dst, XMMRegister src); |
937 void subsd(XMMRegister dst, XMMRegister src); | 977 void subsd(XMMRegister dst, XMMRegister src); |
938 void mulsd(XMMRegister dst, XMMRegister src); | 978 void mulsd(XMMRegister dst, XMMRegister src); |
939 void divsd(XMMRegister dst, XMMRegister src); | 979 void divsd(XMMRegister dst, XMMRegister src); |
940 void xorpd(XMMRegister dst, XMMRegister src); | 980 void xorpd(XMMRegister dst, XMMRegister src); |
941 void xorps(XMMRegister dst, XMMRegister src); | 981 void xorps(XMMRegister dst, XMMRegister src); |
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962 | 1002 |
963 void movdqa(XMMRegister dst, const Operand& src); | 1003 void movdqa(XMMRegister dst, const Operand& src); |
964 void movdqa(const Operand& dst, XMMRegister src); | 1004 void movdqa(const Operand& dst, XMMRegister src); |
965 void movdqu(XMMRegister dst, const Operand& src); | 1005 void movdqu(XMMRegister dst, const Operand& src); |
966 void movdqu(const Operand& dst, XMMRegister src); | 1006 void movdqu(const Operand& dst, XMMRegister src); |
967 | 1007 |
968 // Use either movsd or movlpd. | 1008 // Use either movsd or movlpd. |
969 void movdbl(XMMRegister dst, const Operand& src); | 1009 void movdbl(XMMRegister dst, const Operand& src); |
970 void movdbl(const Operand& dst, XMMRegister src); | 1010 void movdbl(const Operand& dst, XMMRegister src); |
971 | 1011 |
| 1012 void movd(XMMRegister dst, Register src) { movd(dst, Operand(src)); } |
972 void movd(XMMRegister dst, const Operand& src); | 1013 void movd(XMMRegister dst, const Operand& src); |
973 void movd(const Operand& src, XMMRegister dst); | 1014 void movd(Register dst, XMMRegister src) { movd(Operand(dst), src); } |
| 1015 void movd(const Operand& dst, XMMRegister src); |
974 void movsd(XMMRegister dst, XMMRegister src); | 1016 void movsd(XMMRegister dst, XMMRegister src); |
975 | 1017 |
976 void movss(XMMRegister dst, const Operand& src); | 1018 void movss(XMMRegister dst, const Operand& src); |
977 void movss(const Operand& src, XMMRegister dst); | 1019 void movss(const Operand& dst, XMMRegister src); |
978 void movss(XMMRegister dst, XMMRegister src); | 1020 void movss(XMMRegister dst, XMMRegister src); |
979 | 1021 |
980 void pand(XMMRegister dst, XMMRegister src); | 1022 void pand(XMMRegister dst, XMMRegister src); |
981 void pxor(XMMRegister dst, XMMRegister src); | 1023 void pxor(XMMRegister dst, XMMRegister src); |
982 void por(XMMRegister dst, XMMRegister src); | 1024 void por(XMMRegister dst, XMMRegister src); |
983 void ptest(XMMRegister dst, XMMRegister src); | 1025 void ptest(XMMRegister dst, XMMRegister src); |
984 | 1026 |
985 void psllq(XMMRegister reg, int8_t shift); | 1027 void psllq(XMMRegister reg, int8_t shift); |
986 void psllq(XMMRegister dst, XMMRegister src); | 1028 void psllq(XMMRegister dst, XMMRegister src); |
987 void psrlq(XMMRegister reg, int8_t shift); | 1029 void psrlq(XMMRegister reg, int8_t shift); |
988 void psrlq(XMMRegister dst, XMMRegister src); | 1030 void psrlq(XMMRegister dst, XMMRegister src); |
989 void pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle); | 1031 void pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle); |
| 1032 void pextrd(Register dst, XMMRegister src, int8_t offset) { |
| 1033 pextrd(Operand(dst), src, offset); |
| 1034 } |
990 void pextrd(const Operand& dst, XMMRegister src, int8_t offset); | 1035 void pextrd(const Operand& dst, XMMRegister src, int8_t offset); |
| 1036 void pinsrd(XMMRegister dst, Register src, int8_t offset) { |
| 1037 pinsrd(dst, Operand(src), offset); |
| 1038 } |
991 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset); | 1039 void pinsrd(XMMRegister dst, const Operand& src, int8_t offset); |
992 | 1040 |
993 // Parallel XMM operations. | 1041 // Parallel XMM operations. |
994 void movntdqa(XMMRegister src, const Operand& dst); | 1042 void movntdqa(XMMRegister dst, const Operand& src); |
995 void movntdq(const Operand& dst, XMMRegister src); | 1043 void movntdq(const Operand& dst, XMMRegister src); |
996 // Prefetch src position into cache level. | 1044 // Prefetch src position into cache level. |
997 // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a | 1045 // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a |
998 // non-temporal | 1046 // non-temporal |
999 void prefetch(const Operand& src, int level); | 1047 void prefetch(const Operand& src, int level); |
1000 // TODO(lrn): Need SFENCE for movnt? | 1048 // TODO(lrn): Need SFENCE for movnt? |
1001 | 1049 |
1002 // Debugging | 1050 // Debugging |
1003 void Print(); | 1051 void Print(); |
1004 | 1052 |
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1038 PositionsRecorder* positions_recorder() { return &positions_recorder_; } | 1086 PositionsRecorder* positions_recorder() { return &positions_recorder_; } |
1039 | 1087 |
1040 int relocation_writer_size() { | 1088 int relocation_writer_size() { |
1041 return (buffer_ + buffer_size_) - reloc_info_writer.pos(); | 1089 return (buffer_ + buffer_size_) - reloc_info_writer.pos(); |
1042 } | 1090 } |
1043 | 1091 |
1044 // Avoid overflows for displacements etc. | 1092 // Avoid overflows for displacements etc. |
1045 static const int kMaximalBufferSize = 512*MB; | 1093 static const int kMaximalBufferSize = 512*MB; |
1046 static const int kMinimalBufferSize = 4*KB; | 1094 static const int kMinimalBufferSize = 4*KB; |
1047 | 1095 |
| 1096 byte byte_at(int pos) { return buffer_[pos]; } |
| 1097 void set_byte_at(int pos, byte value) { buffer_[pos] = value; } |
| 1098 |
1048 protected: | 1099 protected: |
1049 bool emit_debug_code() const { return emit_debug_code_; } | 1100 bool emit_debug_code() const { return emit_debug_code_; } |
1050 | 1101 |
1051 void movsd(XMMRegister dst, const Operand& src); | 1102 void movsd(XMMRegister dst, const Operand& src); |
1052 void movsd(const Operand& dst, XMMRegister src); | 1103 void movsd(const Operand& dst, XMMRegister src); |
1053 | 1104 |
1054 void emit_sse_operand(XMMRegister reg, const Operand& adr); | 1105 void emit_sse_operand(XMMRegister reg, const Operand& adr); |
1055 void emit_sse_operand(XMMRegister dst, XMMRegister src); | 1106 void emit_sse_operand(XMMRegister dst, XMMRegister src); |
1056 void emit_sse_operand(Register dst, XMMRegister src); | 1107 void emit_sse_operand(Register dst, XMMRegister src); |
1057 | 1108 |
1058 byte* addr_at(int pos) { return buffer_ + pos; } | 1109 byte* addr_at(int pos) { return buffer_ + pos; } |
1059 | 1110 |
| 1111 |
1060 private: | 1112 private: |
1061 byte byte_at(int pos) { return buffer_[pos]; } | |
1062 void set_byte_at(int pos, byte value) { buffer_[pos] = value; } | |
1063 uint32_t long_at(int pos) { | 1113 uint32_t long_at(int pos) { |
1064 return *reinterpret_cast<uint32_t*>(addr_at(pos)); | 1114 return *reinterpret_cast<uint32_t*>(addr_at(pos)); |
1065 } | 1115 } |
1066 void long_at_put(int pos, uint32_t x) { | 1116 void long_at_put(int pos, uint32_t x) { |
1067 *reinterpret_cast<uint32_t*>(addr_at(pos)) = x; | 1117 *reinterpret_cast<uint32_t*>(addr_at(pos)) = x; |
1068 } | 1118 } |
1069 | 1119 |
1070 // code emission | 1120 // code emission |
1071 void GrowBuffer(); | 1121 void GrowBuffer(); |
1072 inline void emit(uint32_t x); | 1122 inline void emit(uint32_t x); |
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1151 private: | 1201 private: |
1152 Assembler* assembler_; | 1202 Assembler* assembler_; |
1153 #ifdef DEBUG | 1203 #ifdef DEBUG |
1154 int space_before_; | 1204 int space_before_; |
1155 #endif | 1205 #endif |
1156 }; | 1206 }; |
1157 | 1207 |
1158 } } // namespace v8::internal | 1208 } } // namespace v8::internal |
1159 | 1209 |
1160 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 1210 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
OLD | NEW |