MIPS: port Add missing write barrier for arguments store ICs.

src/mips/ic-mips.cc

Index: src/mips/ic-mips.cc
diff --git a/src/mips/ic-mips.cc b/src/mips/ic-mips.cc
index 63165e4f2adcc1423f481255e9777a2758069b92..16f969546bce1fd955225f18fcd78349739505c5 100644
--- a/src/mips/ic-mips.cc
+++ b/src/mips/ic-mips.cc
@@ -1006,6 +1006,8 @@ void KeyedStoreIC::GenerateNonStrictArguments(MacroAssembler* masm) {
   MemOperand mapped_location =
       GenerateMappedArgumentsLookup(masm, a2, a1, a3, t0, t1, &notin, &slow);
   __ sw(a0, mapped_location);
+  __ Addu(t2, a3, t1);

[fschneider, 2011/06/24 09:13:38]

Since the store address is already computed by GenerateMappedArgumentsLookup
into t0, I think you could avoid this add here and just write:

__ RecordWrite(a3, t0, t5);

+  __ RecordWrite(a3, t2, t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&notin);
@@ -1013,6 +1015,8 @@ void KeyedStoreIC::GenerateNonStrictArguments(MacroAssembler* masm) {
   MemOperand unmapped_location =
       GenerateUnmappedArgumentsLookup(masm, a1, a3, t0, &slow);
   __ sw(a0, unmapped_location);
+  __ Addu(t2, a3, t0);

[fschneider, 2011/06/24 09:13:38]

Same here. The store address is already computed into t0.

+  __ RecordWrite(a3, t2, t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&slow);