| Index: src/ia32/assembler-ia32.cc
|
| diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc
|
| index b323f0997be723ea90b652377d17bb916637f7a0..311ac39ff9a8f1c31efc4536307cf8c72510f1b3 100644
|
| --- a/src/ia32/assembler-ia32.cc
|
| +++ b/src/ia32/assembler-ia32.cc
|
| @@ -297,17 +297,17 @@ static void InitCoverageLog();
|
| #endif
|
|
|
| Assembler::Assembler(void* buffer, int buffer_size)
|
| - : positions_recorder_(this),
|
| + : AssemblerBase(Isolate::Current()),
|
| + positions_recorder_(this),
|
| emit_debug_code_(FLAG_debug_code) {
|
| - Isolate* isolate = Isolate::Current();
|
| if (buffer == NULL) {
|
| // Do our own buffer management.
|
| if (buffer_size <= kMinimalBufferSize) {
|
| buffer_size = kMinimalBufferSize;
|
|
|
| - if (isolate->assembler_spare_buffer() != NULL) {
|
| - buffer = isolate->assembler_spare_buffer();
|
| - isolate->set_assembler_spare_buffer(NULL);
|
| + if (isolate()->assembler_spare_buffer() != NULL) {
|
| + buffer = isolate()->assembler_spare_buffer();
|
| + isolate()->set_assembler_spare_buffer(NULL);
|
| }
|
| }
|
| if (buffer == NULL) {
|
| @@ -347,11 +347,10 @@ Assembler::Assembler(void* buffer, int buffer_size)
|
|
|
|
|
| Assembler::~Assembler() {
|
| - Isolate* isolate = Isolate::Current();
|
| if (own_buffer_) {
|
| - if (isolate->assembler_spare_buffer() == NULL &&
|
| + if (isolate()->assembler_spare_buffer() == NULL &&
|
| buffer_size_ == kMinimalBufferSize) {
|
| - isolate->set_assembler_spare_buffer(buffer_);
|
| + isolate()->set_assembler_spare_buffer(buffer_);
|
| } else {
|
| DeleteArray(buffer_);
|
| }
|
| @@ -388,7 +387,7 @@ void Assembler::CodeTargetAlign() {
|
|
|
|
|
| void Assembler::cpuid() {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CPUID));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(CPUID));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x0F);
|
| @@ -749,7 +748,7 @@ void Assembler::movzx_w(Register dst, const Operand& src) {
|
|
|
|
|
| void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| UNIMPLEMENTED();
|
| @@ -760,7 +759,7 @@ void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
|
|
|
|
|
| void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| UNIMPLEMENTED();
|
| @@ -771,7 +770,7 @@ void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
|
|
|
|
|
| void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(CMOV));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| // Opcode: 0f 40 + cc /r.
|
| @@ -1452,7 +1451,7 @@ void Assembler::nop() {
|
|
|
|
|
| void Assembler::rdtsc() {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(RDTSC));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(RDTSC));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x0F);
|
| @@ -1858,7 +1857,7 @@ void Assembler::fistp_s(const Operand& adr) {
|
|
|
|
|
| void Assembler::fisttp_s(const Operand& adr) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE3));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xDB);
|
| @@ -1867,7 +1866,7 @@ void Assembler::fisttp_s(const Operand& adr) {
|
|
|
|
|
| void Assembler::fisttp_d(const Operand& adr) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE3));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE3));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xDD);
|
| @@ -2136,7 +2135,7 @@ void Assembler::setcc(Condition cc, Register reg) {
|
|
|
|
|
| void Assembler::cvttss2si(Register dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF3);
|
| @@ -2147,7 +2146,7 @@ void Assembler::cvttss2si(Register dst, const Operand& src) {
|
|
|
|
|
| void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2158,7 +2157,7 @@ void Assembler::cvttsd2si(Register dst, const Operand& src) {
|
|
|
|
|
| void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2169,7 +2168,7 @@ void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
|
|
|
|
|
| void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF3);
|
| @@ -2180,7 +2179,7 @@ void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2191,7 +2190,7 @@ void Assembler::addsd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2202,7 +2201,7 @@ void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2213,7 +2212,7 @@ void Assembler::subsd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2224,7 +2223,7 @@ void Assembler::divsd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2255,7 +2254,7 @@ void Assembler::andpd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2266,7 +2265,7 @@ void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movmskpd(Register dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2277,7 +2276,7 @@ void Assembler::movmskpd(Register dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2289,7 +2288,7 @@ void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movaps(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x0F);
|
| @@ -2299,7 +2298,7 @@ void Assembler::movaps(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2310,7 +2309,7 @@ void Assembler::movdqa(const Operand& dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2321,7 +2320,7 @@ void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
|
|
|
|
| void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF3);
|
| @@ -2332,7 +2331,7 @@ void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
|
|
|
|
|
| void Assembler::movdqu(XMMRegister dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF3);
|
| @@ -2343,7 +2342,7 @@ void Assembler::movdqu(XMMRegister dst, const Operand& src) {
|
|
|
|
|
| void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2355,7 +2354,7 @@ void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
|
|
|
|
|
| void Assembler::movntdq(const Operand& dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2391,7 +2390,7 @@ void Assembler::movdbl(const Operand& dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movsd(const Operand& dst, XMMRegister src ) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2); // double
|
| @@ -2402,7 +2401,7 @@ void Assembler::movsd(const Operand& dst, XMMRegister src ) {
|
|
|
|
|
| void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2); // double
|
| @@ -2413,7 +2412,7 @@ void Assembler::movsd(XMMRegister dst, const Operand& src) {
|
|
|
|
|
| void Assembler::movsd(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0xF2);
|
| @@ -2424,7 +2423,7 @@ void Assembler::movsd(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::movd(XMMRegister dst, const Operand& src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2435,7 +2434,7 @@ void Assembler::movd(XMMRegister dst, const Operand& src) {
|
|
|
|
|
| void Assembler::movd(const Operand& dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2446,7 +2445,7 @@ void Assembler::movd(const Operand& dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::pand(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2457,7 +2456,7 @@ void Assembler::pand(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::pxor(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2468,7 +2467,7 @@ void Assembler::pxor(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::por(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2479,7 +2478,7 @@ void Assembler::por(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::ptest(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2491,7 +2490,7 @@ void Assembler::ptest(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::psllq(XMMRegister reg, int8_t shift) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2503,7 +2502,7 @@ void Assembler::psllq(XMMRegister reg, int8_t shift) {
|
|
|
|
|
| void Assembler::psllq(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2514,7 +2513,7 @@ void Assembler::psllq(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::psrlq(XMMRegister reg, int8_t shift) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2526,7 +2525,7 @@ void Assembler::psrlq(XMMRegister reg, int8_t shift) {
|
|
|
|
|
| void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2537,7 +2536,7 @@ void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
|
|
|
|
|
| void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2549,7 +2548,7 @@ void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
|
|
|
|
|
| void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2562,7 +2561,7 @@ void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
|
|
|
|
|
| void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
|
| - ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
|
| + ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| EMIT(0x66);
|
| @@ -2618,7 +2617,6 @@ void Assembler::RecordComment(const char* msg, bool force) {
|
|
|
|
|
| void Assembler::GrowBuffer() {
|
| - Isolate* isolate = Isolate::Current();
|
| ASSERT(overflow());
|
| if (!own_buffer_) FATAL("external code buffer is too small");
|
|
|
| @@ -2655,9 +2653,9 @@ void Assembler::GrowBuffer() {
|
| reloc_info_writer.pos(), desc.reloc_size);
|
|
|
| // Switch buffers.
|
| - if (isolate->assembler_spare_buffer() == NULL &&
|
| + if (isolate()->assembler_spare_buffer() == NULL &&
|
| buffer_size_ == kMinimalBufferSize) {
|
| - isolate->set_assembler_spare_buffer(buffer_);
|
| + isolate()->set_assembler_spare_buffer(buffer_);
|
| } else {
|
| DeleteArray(buffer_);
|
| }
|
|
|