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Issue 6713074: Require an isolate parameter for most external reference creation to (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Further cleanup Created 9 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 279 matching lines...) Expand 10 before | Expand all | Expand 10 after
290 // Emit a single byte. Must always be inlined. 290 // Emit a single byte. Must always be inlined.
291 #define EMIT(x) \ 291 #define EMIT(x) \
292 *pc_++ = (x) 292 *pc_++ = (x)
293 293
294 294
295 #ifdef GENERATED_CODE_COVERAGE 295 #ifdef GENERATED_CODE_COVERAGE
296 static void InitCoverageLog(); 296 static void InitCoverageLog();
297 #endif 297 #endif
298 298
299 Assembler::Assembler(void* buffer, int buffer_size) 299 Assembler::Assembler(void* buffer, int buffer_size)
300 : positions_recorder_(this), 300 : AssemblerBase(Isolate::Current()),
301 positions_recorder_(this),
301 emit_debug_code_(FLAG_debug_code) { 302 emit_debug_code_(FLAG_debug_code) {
302 Isolate* isolate = Isolate::Current();
303 if (buffer == NULL) { 303 if (buffer == NULL) {
304 // Do our own buffer management. 304 // Do our own buffer management.
305 if (buffer_size <= kMinimalBufferSize) { 305 if (buffer_size <= kMinimalBufferSize) {
306 buffer_size = kMinimalBufferSize; 306 buffer_size = kMinimalBufferSize;
307 307
308 if (isolate->assembler_spare_buffer() != NULL) { 308 if (isolate()->assembler_spare_buffer() != NULL) {
309 buffer = isolate->assembler_spare_buffer(); 309 buffer = isolate()->assembler_spare_buffer();
310 isolate->set_assembler_spare_buffer(NULL); 310 isolate()->set_assembler_spare_buffer(NULL);
311 } 311 }
312 } 312 }
313 if (buffer == NULL) { 313 if (buffer == NULL) {
314 buffer_ = NewArray<byte>(buffer_size); 314 buffer_ = NewArray<byte>(buffer_size);
315 } else { 315 } else {
316 buffer_ = static_cast<byte*>(buffer); 316 buffer_ = static_cast<byte*>(buffer);
317 } 317 }
318 buffer_size_ = buffer_size; 318 buffer_size_ = buffer_size;
319 own_buffer_ = true; 319 own_buffer_ = true;
320 } else { 320 } else {
(...skipping 19 matching lines...) Expand all
340 reloc_info_writer.Reposition(buffer_ + buffer_size, pc_); 340 reloc_info_writer.Reposition(buffer_ + buffer_size, pc_);
341 341
342 last_pc_ = NULL; 342 last_pc_ = NULL;
343 #ifdef GENERATED_CODE_COVERAGE 343 #ifdef GENERATED_CODE_COVERAGE
344 InitCoverageLog(); 344 InitCoverageLog();
345 #endif 345 #endif
346 } 346 }
347 347
348 348
349 Assembler::~Assembler() { 349 Assembler::~Assembler() {
350 Isolate* isolate = Isolate::Current();
351 if (own_buffer_) { 350 if (own_buffer_) {
352 if (isolate->assembler_spare_buffer() == NULL && 351 if (isolate()->assembler_spare_buffer() == NULL &&
353 buffer_size_ == kMinimalBufferSize) { 352 buffer_size_ == kMinimalBufferSize) {
354 isolate->set_assembler_spare_buffer(buffer_); 353 isolate()->set_assembler_spare_buffer(buffer_);
355 } else { 354 } else {
356 DeleteArray(buffer_); 355 DeleteArray(buffer_);
357 } 356 }
358 } 357 }
359 } 358 }
360 359
361 360
362 void Assembler::GetCode(CodeDesc* desc) { 361 void Assembler::GetCode(CodeDesc* desc) {
363 // Finalize code (at this point overflow() may be true, but the gap ensures 362 // Finalize code (at this point overflow() may be true, but the gap ensures
364 // that we are still not overlapping instructions and relocation info). 363 // that we are still not overlapping instructions and relocation info).
(...skipping 16 matching lines...) Expand all
381 } 380 }
382 } 381 }
383 382
384 383
385 void Assembler::CodeTargetAlign() { 384 void Assembler::CodeTargetAlign() {
386 Align(16); // Preferred alignment of jump targets on ia32. 385 Align(16); // Preferred alignment of jump targets on ia32.
387 } 386 }
388 387
389 388
390 void Assembler::cpuid() { 389 void Assembler::cpuid() {
391 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CPUID)); 390 ASSERT(isolate()->cpu_features()->IsEnabled(CPUID));
392 EnsureSpace ensure_space(this); 391 EnsureSpace ensure_space(this);
393 last_pc_ = pc_; 392 last_pc_ = pc_;
394 EMIT(0x0F); 393 EMIT(0x0F);
395 EMIT(0xA2); 394 EMIT(0xA2);
396 } 395 }
397 396
398 397
399 void Assembler::pushad() { 398 void Assembler::pushad() {
400 EnsureSpace ensure_space(this); 399 EnsureSpace ensure_space(this);
401 last_pc_ = pc_; 400 last_pc_ = pc_;
(...skipping 340 matching lines...) Expand 10 before | Expand all | Expand 10 after
742 void Assembler::movzx_w(Register dst, const Operand& src) { 741 void Assembler::movzx_w(Register dst, const Operand& src) {
743 EnsureSpace ensure_space(this); 742 EnsureSpace ensure_space(this);
744 last_pc_ = pc_; 743 last_pc_ = pc_;
745 EMIT(0x0F); 744 EMIT(0x0F);
746 EMIT(0xB7); 745 EMIT(0xB7);
747 emit_operand(dst, src); 746 emit_operand(dst, src);
748 } 747 }
749 748
750 749
751 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) { 750 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
752 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV)); 751 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV));
753 EnsureSpace ensure_space(this); 752 EnsureSpace ensure_space(this);
754 last_pc_ = pc_; 753 last_pc_ = pc_;
755 UNIMPLEMENTED(); 754 UNIMPLEMENTED();
756 USE(cc); 755 USE(cc);
757 USE(dst); 756 USE(dst);
758 USE(imm32); 757 USE(imm32);
759 } 758 }
760 759
761 760
762 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) { 761 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
763 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV)); 762 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV));
764 EnsureSpace ensure_space(this); 763 EnsureSpace ensure_space(this);
765 last_pc_ = pc_; 764 last_pc_ = pc_;
766 UNIMPLEMENTED(); 765 UNIMPLEMENTED();
767 USE(cc); 766 USE(cc);
768 USE(dst); 767 USE(dst);
769 USE(handle); 768 USE(handle);
770 } 769 }
771 770
772 771
773 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { 772 void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
774 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(CMOV)); 773 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV));
775 EnsureSpace ensure_space(this); 774 EnsureSpace ensure_space(this);
776 last_pc_ = pc_; 775 last_pc_ = pc_;
777 // Opcode: 0f 40 + cc /r. 776 // Opcode: 0f 40 + cc /r.
778 EMIT(0x0F); 777 EMIT(0x0F);
779 EMIT(0x40 + cc); 778 EMIT(0x40 + cc);
780 emit_operand(dst, src); 779 emit_operand(dst, src);
781 } 780 }
782 781
783 782
784 void Assembler::cld() { 783 void Assembler::cld() {
(...skipping 660 matching lines...) Expand 10 before | Expand all | Expand 10 after
1445 1444
1446 1445
1447 void Assembler::nop() { 1446 void Assembler::nop() {
1448 EnsureSpace ensure_space(this); 1447 EnsureSpace ensure_space(this);
1449 last_pc_ = pc_; 1448 last_pc_ = pc_;
1450 EMIT(0x90); 1449 EMIT(0x90);
1451 } 1450 }
1452 1451
1453 1452
1454 void Assembler::rdtsc() { 1453 void Assembler::rdtsc() {
1455 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(RDTSC)); 1454 ASSERT(isolate()->cpu_features()->IsEnabled(RDTSC));
1456 EnsureSpace ensure_space(this); 1455 EnsureSpace ensure_space(this);
1457 last_pc_ = pc_; 1456 last_pc_ = pc_;
1458 EMIT(0x0F); 1457 EMIT(0x0F);
1459 EMIT(0x31); 1458 EMIT(0x31);
1460 } 1459 }
1461 1460
1462 1461
1463 void Assembler::ret(int imm16) { 1462 void Assembler::ret(int imm16) {
1464 EnsureSpace ensure_space(this); 1463 EnsureSpace ensure_space(this);
1465 last_pc_ = pc_; 1464 last_pc_ = pc_;
(...skipping 385 matching lines...) Expand 10 before | Expand all | Expand 10 after
1851 1850
1852 void Assembler::fistp_s(const Operand& adr) { 1851 void Assembler::fistp_s(const Operand& adr) {
1853 EnsureSpace ensure_space(this); 1852 EnsureSpace ensure_space(this);
1854 last_pc_ = pc_; 1853 last_pc_ = pc_;
1855 EMIT(0xDB); 1854 EMIT(0xDB);
1856 emit_operand(ebx, adr); 1855 emit_operand(ebx, adr);
1857 } 1856 }
1858 1857
1859 1858
1860 void Assembler::fisttp_s(const Operand& adr) { 1859 void Assembler::fisttp_s(const Operand& adr) {
1861 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE3)); 1860 ASSERT(isolate()->cpu_features()->IsEnabled(SSE3));
1862 EnsureSpace ensure_space(this); 1861 EnsureSpace ensure_space(this);
1863 last_pc_ = pc_; 1862 last_pc_ = pc_;
1864 EMIT(0xDB); 1863 EMIT(0xDB);
1865 emit_operand(ecx, adr); 1864 emit_operand(ecx, adr);
1866 } 1865 }
1867 1866
1868 1867
1869 void Assembler::fisttp_d(const Operand& adr) { 1868 void Assembler::fisttp_d(const Operand& adr) {
1870 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE3)); 1869 ASSERT(isolate()->cpu_features()->IsEnabled(SSE3));
1871 EnsureSpace ensure_space(this); 1870 EnsureSpace ensure_space(this);
1872 last_pc_ = pc_; 1871 last_pc_ = pc_;
1873 EMIT(0xDD); 1872 EMIT(0xDD);
1874 emit_operand(ecx, adr); 1873 emit_operand(ecx, adr);
1875 } 1874 }
1876 1875
1877 1876
1878 void Assembler::fist_s(const Operand& adr) { 1877 void Assembler::fist_s(const Operand& adr) {
1879 EnsureSpace ensure_space(this); 1878 EnsureSpace ensure_space(this);
1880 last_pc_ = pc_; 1879 last_pc_ = pc_;
(...skipping 248 matching lines...) Expand 10 before | Expand all | Expand 10 after
2129 ASSERT(reg.is_byte_register()); 2128 ASSERT(reg.is_byte_register());
2130 EnsureSpace ensure_space(this); 2129 EnsureSpace ensure_space(this);
2131 last_pc_ = pc_; 2130 last_pc_ = pc_;
2132 EMIT(0x0F); 2131 EMIT(0x0F);
2133 EMIT(0x90 | cc); 2132 EMIT(0x90 | cc);
2134 EMIT(0xC0 | reg.code()); 2133 EMIT(0xC0 | reg.code());
2135 } 2134 }
2136 2135
2137 2136
2138 void Assembler::cvttss2si(Register dst, const Operand& src) { 2137 void Assembler::cvttss2si(Register dst, const Operand& src) {
2139 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2138 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2140 EnsureSpace ensure_space(this); 2139 EnsureSpace ensure_space(this);
2141 last_pc_ = pc_; 2140 last_pc_ = pc_;
2142 EMIT(0xF3); 2141 EMIT(0xF3);
2143 EMIT(0x0F); 2142 EMIT(0x0F);
2144 EMIT(0x2C); 2143 EMIT(0x2C);
2145 emit_operand(dst, src); 2144 emit_operand(dst, src);
2146 } 2145 }
2147 2146
2148 2147
2149 void Assembler::cvttsd2si(Register dst, const Operand& src) { 2148 void Assembler::cvttsd2si(Register dst, const Operand& src) {
2150 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2149 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2151 EnsureSpace ensure_space(this); 2150 EnsureSpace ensure_space(this);
2152 last_pc_ = pc_; 2151 last_pc_ = pc_;
2153 EMIT(0xF2); 2152 EMIT(0xF2);
2154 EMIT(0x0F); 2153 EMIT(0x0F);
2155 EMIT(0x2C); 2154 EMIT(0x2C);
2156 emit_operand(dst, src); 2155 emit_operand(dst, src);
2157 } 2156 }
2158 2157
2159 2158
2160 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) { 2159 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
2161 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2160 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2162 EnsureSpace ensure_space(this); 2161 EnsureSpace ensure_space(this);
2163 last_pc_ = pc_; 2162 last_pc_ = pc_;
2164 EMIT(0xF2); 2163 EMIT(0xF2);
2165 EMIT(0x0F); 2164 EMIT(0x0F);
2166 EMIT(0x2A); 2165 EMIT(0x2A);
2167 emit_sse_operand(dst, src); 2166 emit_sse_operand(dst, src);
2168 } 2167 }
2169 2168
2170 2169
2171 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { 2170 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
2172 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2171 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2173 EnsureSpace ensure_space(this); 2172 EnsureSpace ensure_space(this);
2174 last_pc_ = pc_; 2173 last_pc_ = pc_;
2175 EMIT(0xF3); 2174 EMIT(0xF3);
2176 EMIT(0x0F); 2175 EMIT(0x0F);
2177 EMIT(0x5A); 2176 EMIT(0x5A);
2178 emit_sse_operand(dst, src); 2177 emit_sse_operand(dst, src);
2179 } 2178 }
2180 2179
2181 2180
2182 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 2181 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
2183 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2182 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2184 EnsureSpace ensure_space(this); 2183 EnsureSpace ensure_space(this);
2185 last_pc_ = pc_; 2184 last_pc_ = pc_;
2186 EMIT(0xF2); 2185 EMIT(0xF2);
2187 EMIT(0x0F); 2186 EMIT(0x0F);
2188 EMIT(0x58); 2187 EMIT(0x58);
2189 emit_sse_operand(dst, src); 2188 emit_sse_operand(dst, src);
2190 } 2189 }
2191 2190
2192 2191
2193 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { 2192 void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
2194 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2193 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2195 EnsureSpace ensure_space(this); 2194 EnsureSpace ensure_space(this);
2196 last_pc_ = pc_; 2195 last_pc_ = pc_;
2197 EMIT(0xF2); 2196 EMIT(0xF2);
2198 EMIT(0x0F); 2197 EMIT(0x0F);
2199 EMIT(0x59); 2198 EMIT(0x59);
2200 emit_sse_operand(dst, src); 2199 emit_sse_operand(dst, src);
2201 } 2200 }
2202 2201
2203 2202
2204 void Assembler::subsd(XMMRegister dst, XMMRegister src) { 2203 void Assembler::subsd(XMMRegister dst, XMMRegister src) {
2205 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2204 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2206 EnsureSpace ensure_space(this); 2205 EnsureSpace ensure_space(this);
2207 last_pc_ = pc_; 2206 last_pc_ = pc_;
2208 EMIT(0xF2); 2207 EMIT(0xF2);
2209 EMIT(0x0F); 2208 EMIT(0x0F);
2210 EMIT(0x5C); 2209 EMIT(0x5C);
2211 emit_sse_operand(dst, src); 2210 emit_sse_operand(dst, src);
2212 } 2211 }
2213 2212
2214 2213
2215 void Assembler::divsd(XMMRegister dst, XMMRegister src) { 2214 void Assembler::divsd(XMMRegister dst, XMMRegister src) {
2216 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2215 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2217 EnsureSpace ensure_space(this); 2216 EnsureSpace ensure_space(this);
2218 last_pc_ = pc_; 2217 last_pc_ = pc_;
2219 EMIT(0xF2); 2218 EMIT(0xF2);
2220 EMIT(0x0F); 2219 EMIT(0x0F);
2221 EMIT(0x5E); 2220 EMIT(0x5E);
2222 emit_sse_operand(dst, src); 2221 emit_sse_operand(dst, src);
2223 } 2222 }
2224 2223
2225 2224
2226 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 2225 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2227 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2226 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2228 EnsureSpace ensure_space(this); 2227 EnsureSpace ensure_space(this);
2229 last_pc_ = pc_; 2228 last_pc_ = pc_;
2230 EMIT(0x66); 2229 EMIT(0x66);
2231 EMIT(0x0F); 2230 EMIT(0x0F);
2232 EMIT(0x57); 2231 EMIT(0x57);
2233 emit_sse_operand(dst, src); 2232 emit_sse_operand(dst, src);
2234 } 2233 }
2235 2234
2236 2235
2237 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2236 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
(...skipping 10 matching lines...) Expand all
2248 EnsureSpace ensure_space(this); 2247 EnsureSpace ensure_space(this);
2249 last_pc_ = pc_; 2248 last_pc_ = pc_;
2250 EMIT(0x66); 2249 EMIT(0x66);
2251 EMIT(0x0F); 2250 EMIT(0x0F);
2252 EMIT(0x54); 2251 EMIT(0x54);
2253 emit_sse_operand(dst, src); 2252 emit_sse_operand(dst, src);
2254 } 2253 }
2255 2254
2256 2255
2257 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 2256 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2258 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2257 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2259 EnsureSpace ensure_space(this); 2258 EnsureSpace ensure_space(this);
2260 last_pc_ = pc_; 2259 last_pc_ = pc_;
2261 EMIT(0x66); 2260 EMIT(0x66);
2262 EMIT(0x0F); 2261 EMIT(0x0F);
2263 EMIT(0x2E); 2262 EMIT(0x2E);
2264 emit_sse_operand(dst, src); 2263 emit_sse_operand(dst, src);
2265 } 2264 }
2266 2265
2267 2266
2268 void Assembler::movmskpd(Register dst, XMMRegister src) { 2267 void Assembler::movmskpd(Register dst, XMMRegister src) {
2269 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2268 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2270 EnsureSpace ensure_space(this); 2269 EnsureSpace ensure_space(this);
2271 last_pc_ = pc_; 2270 last_pc_ = pc_;
2272 EMIT(0x66); 2271 EMIT(0x66);
2273 EMIT(0x0F); 2272 EMIT(0x0F);
2274 EMIT(0x50); 2273 EMIT(0x50);
2275 emit_sse_operand(dst, src); 2274 emit_sse_operand(dst, src);
2276 } 2275 }
2277 2276
2278 2277
2279 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { 2278 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
2280 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2279 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2281 EnsureSpace ensure_space(this); 2280 EnsureSpace ensure_space(this);
2282 last_pc_ = pc_; 2281 last_pc_ = pc_;
2283 EMIT(0xF2); 2282 EMIT(0xF2);
2284 EMIT(0x0F); 2283 EMIT(0x0F);
2285 EMIT(0xC2); 2284 EMIT(0xC2);
2286 emit_sse_operand(dst, src); 2285 emit_sse_operand(dst, src);
2287 EMIT(1); // LT == 1 2286 EMIT(1); // LT == 1
2288 } 2287 }
2289 2288
2290 2289
2291 void Assembler::movaps(XMMRegister dst, XMMRegister src) { 2290 void Assembler::movaps(XMMRegister dst, XMMRegister src) {
2292 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2291 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2293 EnsureSpace ensure_space(this); 2292 EnsureSpace ensure_space(this);
2294 last_pc_ = pc_; 2293 last_pc_ = pc_;
2295 EMIT(0x0F); 2294 EMIT(0x0F);
2296 EMIT(0x28); 2295 EMIT(0x28);
2297 emit_sse_operand(dst, src); 2296 emit_sse_operand(dst, src);
2298 } 2297 }
2299 2298
2300 2299
2301 void Assembler::movdqa(const Operand& dst, XMMRegister src) { 2300 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2302 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2301 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2303 EnsureSpace ensure_space(this); 2302 EnsureSpace ensure_space(this);
2304 last_pc_ = pc_; 2303 last_pc_ = pc_;
2305 EMIT(0x66); 2304 EMIT(0x66);
2306 EMIT(0x0F); 2305 EMIT(0x0F);
2307 EMIT(0x7F); 2306 EMIT(0x7F);
2308 emit_sse_operand(src, dst); 2307 emit_sse_operand(src, dst);
2309 } 2308 }
2310 2309
2311 2310
2312 void Assembler::movdqa(XMMRegister dst, const Operand& src) { 2311 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2313 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2312 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2314 EnsureSpace ensure_space(this); 2313 EnsureSpace ensure_space(this);
2315 last_pc_ = pc_; 2314 last_pc_ = pc_;
2316 EMIT(0x66); 2315 EMIT(0x66);
2317 EMIT(0x0F); 2316 EMIT(0x0F);
2318 EMIT(0x6F); 2317 EMIT(0x6F);
2319 emit_sse_operand(dst, src); 2318 emit_sse_operand(dst, src);
2320 } 2319 }
2321 2320
2322 2321
2323 void Assembler::movdqu(const Operand& dst, XMMRegister src ) { 2322 void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
2324 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2323 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2325 EnsureSpace ensure_space(this); 2324 EnsureSpace ensure_space(this);
2326 last_pc_ = pc_; 2325 last_pc_ = pc_;
2327 EMIT(0xF3); 2326 EMIT(0xF3);
2328 EMIT(0x0F); 2327 EMIT(0x0F);
2329 EMIT(0x7F); 2328 EMIT(0x7F);
2330 emit_sse_operand(src, dst); 2329 emit_sse_operand(src, dst);
2331 } 2330 }
2332 2331
2333 2332
2334 void Assembler::movdqu(XMMRegister dst, const Operand& src) { 2333 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2335 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2334 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2336 EnsureSpace ensure_space(this); 2335 EnsureSpace ensure_space(this);
2337 last_pc_ = pc_; 2336 last_pc_ = pc_;
2338 EMIT(0xF3); 2337 EMIT(0xF3);
2339 EMIT(0x0F); 2338 EMIT(0x0F);
2340 EMIT(0x6F); 2339 EMIT(0x6F);
2341 emit_sse_operand(dst, src); 2340 emit_sse_operand(dst, src);
2342 } 2341 }
2343 2342
2344 2343
2345 void Assembler::movntdqa(XMMRegister dst, const Operand& src) { 2344 void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
2346 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1)); 2345 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
2347 EnsureSpace ensure_space(this); 2346 EnsureSpace ensure_space(this);
2348 last_pc_ = pc_; 2347 last_pc_ = pc_;
2349 EMIT(0x66); 2348 EMIT(0x66);
2350 EMIT(0x0F); 2349 EMIT(0x0F);
2351 EMIT(0x38); 2350 EMIT(0x38);
2352 EMIT(0x2A); 2351 EMIT(0x2A);
2353 emit_sse_operand(dst, src); 2352 emit_sse_operand(dst, src);
2354 } 2353 }
2355 2354
2356 2355
2357 void Assembler::movntdq(const Operand& dst, XMMRegister src) { 2356 void Assembler::movntdq(const Operand& dst, XMMRegister src) {
2358 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2357 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2359 EnsureSpace ensure_space(this); 2358 EnsureSpace ensure_space(this);
2360 last_pc_ = pc_; 2359 last_pc_ = pc_;
2361 EMIT(0x66); 2360 EMIT(0x66);
2362 EMIT(0x0F); 2361 EMIT(0x0F);
2363 EMIT(0xE7); 2362 EMIT(0xE7);
2364 emit_sse_operand(src, dst); 2363 emit_sse_operand(src, dst);
2365 } 2364 }
2366 2365
2367 2366
2368 void Assembler::prefetch(const Operand& src, int level) { 2367 void Assembler::prefetch(const Operand& src, int level) {
(...skipping 15 matching lines...) Expand all
2384 2383
2385 2384
2386 void Assembler::movdbl(const Operand& dst, XMMRegister src) { 2385 void Assembler::movdbl(const Operand& dst, XMMRegister src) {
2387 EnsureSpace ensure_space(this); 2386 EnsureSpace ensure_space(this);
2388 last_pc_ = pc_; 2387 last_pc_ = pc_;
2389 movsd(dst, src); 2388 movsd(dst, src);
2390 } 2389 }
2391 2390
2392 2391
2393 void Assembler::movsd(const Operand& dst, XMMRegister src ) { 2392 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2394 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2393 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2395 EnsureSpace ensure_space(this); 2394 EnsureSpace ensure_space(this);
2396 last_pc_ = pc_; 2395 last_pc_ = pc_;
2397 EMIT(0xF2); // double 2396 EMIT(0xF2); // double
2398 EMIT(0x0F); 2397 EMIT(0x0F);
2399 EMIT(0x11); // store 2398 EMIT(0x11); // store
2400 emit_sse_operand(src, dst); 2399 emit_sse_operand(src, dst);
2401 } 2400 }
2402 2401
2403 2402
2404 void Assembler::movsd(XMMRegister dst, const Operand& src) { 2403 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2405 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2404 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2406 EnsureSpace ensure_space(this); 2405 EnsureSpace ensure_space(this);
2407 last_pc_ = pc_; 2406 last_pc_ = pc_;
2408 EMIT(0xF2); // double 2407 EMIT(0xF2); // double
2409 EMIT(0x0F); 2408 EMIT(0x0F);
2410 EMIT(0x10); // load 2409 EMIT(0x10); // load
2411 emit_sse_operand(dst, src); 2410 emit_sse_operand(dst, src);
2412 } 2411 }
2413 2412
2414 2413
2415 void Assembler::movsd(XMMRegister dst, XMMRegister src) { 2414 void Assembler::movsd(XMMRegister dst, XMMRegister src) {
2416 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2415 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2417 EnsureSpace ensure_space(this); 2416 EnsureSpace ensure_space(this);
2418 last_pc_ = pc_; 2417 last_pc_ = pc_;
2419 EMIT(0xF2); 2418 EMIT(0xF2);
2420 EMIT(0x0F); 2419 EMIT(0x0F);
2421 EMIT(0x10); 2420 EMIT(0x10);
2422 emit_sse_operand(dst, src); 2421 emit_sse_operand(dst, src);
2423 } 2422 }
2424 2423
2425 2424
2426 void Assembler::movd(XMMRegister dst, const Operand& src) { 2425 void Assembler::movd(XMMRegister dst, const Operand& src) {
2427 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2426 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2428 EnsureSpace ensure_space(this); 2427 EnsureSpace ensure_space(this);
2429 last_pc_ = pc_; 2428 last_pc_ = pc_;
2430 EMIT(0x66); 2429 EMIT(0x66);
2431 EMIT(0x0F); 2430 EMIT(0x0F);
2432 EMIT(0x6E); 2431 EMIT(0x6E);
2433 emit_sse_operand(dst, src); 2432 emit_sse_operand(dst, src);
2434 } 2433 }
2435 2434
2436 2435
2437 void Assembler::movd(const Operand& dst, XMMRegister src) { 2436 void Assembler::movd(const Operand& dst, XMMRegister src) {
2438 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2437 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2439 EnsureSpace ensure_space(this); 2438 EnsureSpace ensure_space(this);
2440 last_pc_ = pc_; 2439 last_pc_ = pc_;
2441 EMIT(0x66); 2440 EMIT(0x66);
2442 EMIT(0x0F); 2441 EMIT(0x0F);
2443 EMIT(0x7E); 2442 EMIT(0x7E);
2444 emit_sse_operand(src, dst); 2443 emit_sse_operand(src, dst);
2445 } 2444 }
2446 2445
2447 2446
2448 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2447 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2449 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2448 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2450 EnsureSpace ensure_space(this); 2449 EnsureSpace ensure_space(this);
2451 last_pc_ = pc_; 2450 last_pc_ = pc_;
2452 EMIT(0x66); 2451 EMIT(0x66);
2453 EMIT(0x0F); 2452 EMIT(0x0F);
2454 EMIT(0xDB); 2453 EMIT(0xDB);
2455 emit_sse_operand(dst, src); 2454 emit_sse_operand(dst, src);
2456 } 2455 }
2457 2456
2458 2457
2459 void Assembler::pxor(XMMRegister dst, XMMRegister src) { 2458 void Assembler::pxor(XMMRegister dst, XMMRegister src) {
2460 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2459 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2461 EnsureSpace ensure_space(this); 2460 EnsureSpace ensure_space(this);
2462 last_pc_ = pc_; 2461 last_pc_ = pc_;
2463 EMIT(0x66); 2462 EMIT(0x66);
2464 EMIT(0x0F); 2463 EMIT(0x0F);
2465 EMIT(0xEF); 2464 EMIT(0xEF);
2466 emit_sse_operand(dst, src); 2465 emit_sse_operand(dst, src);
2467 } 2466 }
2468 2467
2469 2468
2470 void Assembler::por(XMMRegister dst, XMMRegister src) { 2469 void Assembler::por(XMMRegister dst, XMMRegister src) {
2471 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2470 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2472 EnsureSpace ensure_space(this); 2471 EnsureSpace ensure_space(this);
2473 last_pc_ = pc_; 2472 last_pc_ = pc_;
2474 EMIT(0x66); 2473 EMIT(0x66);
2475 EMIT(0x0F); 2474 EMIT(0x0F);
2476 EMIT(0xEB); 2475 EMIT(0xEB);
2477 emit_sse_operand(dst, src); 2476 emit_sse_operand(dst, src);
2478 } 2477 }
2479 2478
2480 2479
2481 void Assembler::ptest(XMMRegister dst, XMMRegister src) { 2480 void Assembler::ptest(XMMRegister dst, XMMRegister src) {
2482 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1)); 2481 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
2483 EnsureSpace ensure_space(this); 2482 EnsureSpace ensure_space(this);
2484 last_pc_ = pc_; 2483 last_pc_ = pc_;
2485 EMIT(0x66); 2484 EMIT(0x66);
2486 EMIT(0x0F); 2485 EMIT(0x0F);
2487 EMIT(0x38); 2486 EMIT(0x38);
2488 EMIT(0x17); 2487 EMIT(0x17);
2489 emit_sse_operand(dst, src); 2488 emit_sse_operand(dst, src);
2490 } 2489 }
2491 2490
2492 2491
2493 void Assembler::psllq(XMMRegister reg, int8_t shift) { 2492 void Assembler::psllq(XMMRegister reg, int8_t shift) {
2494 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2493 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2495 EnsureSpace ensure_space(this); 2494 EnsureSpace ensure_space(this);
2496 last_pc_ = pc_; 2495 last_pc_ = pc_;
2497 EMIT(0x66); 2496 EMIT(0x66);
2498 EMIT(0x0F); 2497 EMIT(0x0F);
2499 EMIT(0x73); 2498 EMIT(0x73);
2500 emit_sse_operand(esi, reg); // esi == 6 2499 emit_sse_operand(esi, reg); // esi == 6
2501 EMIT(shift); 2500 EMIT(shift);
2502 } 2501 }
2503 2502
2504 2503
2505 void Assembler::psllq(XMMRegister dst, XMMRegister src) { 2504 void Assembler::psllq(XMMRegister dst, XMMRegister src) {
2506 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2505 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2507 EnsureSpace ensure_space(this); 2506 EnsureSpace ensure_space(this);
2508 last_pc_ = pc_; 2507 last_pc_ = pc_;
2509 EMIT(0x66); 2508 EMIT(0x66);
2510 EMIT(0x0F); 2509 EMIT(0x0F);
2511 EMIT(0xF3); 2510 EMIT(0xF3);
2512 emit_sse_operand(dst, src); 2511 emit_sse_operand(dst, src);
2513 } 2512 }
2514 2513
2515 2514
2516 void Assembler::psrlq(XMMRegister reg, int8_t shift) { 2515 void Assembler::psrlq(XMMRegister reg, int8_t shift) {
2517 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2516 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2518 EnsureSpace ensure_space(this); 2517 EnsureSpace ensure_space(this);
2519 last_pc_ = pc_; 2518 last_pc_ = pc_;
2520 EMIT(0x66); 2519 EMIT(0x66);
2521 EMIT(0x0F); 2520 EMIT(0x0F);
2522 EMIT(0x73); 2521 EMIT(0x73);
2523 emit_sse_operand(edx, reg); // edx == 2 2522 emit_sse_operand(edx, reg); // edx == 2
2524 EMIT(shift); 2523 EMIT(shift);
2525 } 2524 }
2526 2525
2527 2526
2528 void Assembler::psrlq(XMMRegister dst, XMMRegister src) { 2527 void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
2529 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2528 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2530 EnsureSpace ensure_space(this); 2529 EnsureSpace ensure_space(this);
2531 last_pc_ = pc_; 2530 last_pc_ = pc_;
2532 EMIT(0x66); 2531 EMIT(0x66);
2533 EMIT(0x0F); 2532 EMIT(0x0F);
2534 EMIT(0xD3); 2533 EMIT(0xD3);
2535 emit_sse_operand(dst, src); 2534 emit_sse_operand(dst, src);
2536 } 2535 }
2537 2536
2538 2537
2539 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) { 2538 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
2540 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2)); 2539 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2));
2541 EnsureSpace ensure_space(this); 2540 EnsureSpace ensure_space(this);
2542 last_pc_ = pc_; 2541 last_pc_ = pc_;
2543 EMIT(0x66); 2542 EMIT(0x66);
2544 EMIT(0x0F); 2543 EMIT(0x0F);
2545 EMIT(0x70); 2544 EMIT(0x70);
2546 emit_sse_operand(dst, src); 2545 emit_sse_operand(dst, src);
2547 EMIT(shuffle); 2546 EMIT(shuffle);
2548 } 2547 }
2549 2548
2550 2549
2551 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) { 2550 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
2552 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1)); 2551 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
2553 EnsureSpace ensure_space(this); 2552 EnsureSpace ensure_space(this);
2554 last_pc_ = pc_; 2553 last_pc_ = pc_;
2555 EMIT(0x66); 2554 EMIT(0x66);
2556 EMIT(0x0F); 2555 EMIT(0x0F);
2557 EMIT(0x3A); 2556 EMIT(0x3A);
2558 EMIT(0x16); 2557 EMIT(0x16);
2559 emit_sse_operand(src, dst); 2558 emit_sse_operand(src, dst);
2560 EMIT(offset); 2559 EMIT(offset);
2561 } 2560 }
2562 2561
2563 2562
2564 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { 2563 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
2565 ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1)); 2564 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1));
2566 EnsureSpace ensure_space(this); 2565 EnsureSpace ensure_space(this);
2567 last_pc_ = pc_; 2566 last_pc_ = pc_;
2568 EMIT(0x66); 2567 EMIT(0x66);
2569 EMIT(0x0F); 2568 EMIT(0x0F);
2570 EMIT(0x3A); 2569 EMIT(0x3A);
2571 EMIT(0x22); 2570 EMIT(0x22);
2572 emit_sse_operand(dst, src); 2571 emit_sse_operand(dst, src);
2573 EMIT(offset); 2572 EMIT(offset);
2574 } 2573 }
2575 2574
(...skipping 35 matching lines...) Expand 10 before | Expand all | Expand 10 after
2611 2610
2612 void Assembler::RecordComment(const char* msg, bool force) { 2611 void Assembler::RecordComment(const char* msg, bool force) {
2613 if (FLAG_code_comments || force) { 2612 if (FLAG_code_comments || force) {
2614 EnsureSpace ensure_space(this); 2613 EnsureSpace ensure_space(this);
2615 RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg)); 2614 RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg));
2616 } 2615 }
2617 } 2616 }
2618 2617
2619 2618
2620 void Assembler::GrowBuffer() { 2619 void Assembler::GrowBuffer() {
2621 Isolate* isolate = Isolate::Current();
2622 ASSERT(overflow()); 2620 ASSERT(overflow());
2623 if (!own_buffer_) FATAL("external code buffer is too small"); 2621 if (!own_buffer_) FATAL("external code buffer is too small");
2624 2622
2625 // Compute new buffer size. 2623 // Compute new buffer size.
2626 CodeDesc desc; // the new buffer 2624 CodeDesc desc; // the new buffer
2627 if (buffer_size_ < 4*KB) { 2625 if (buffer_size_ < 4*KB) {
2628 desc.buffer_size = 4*KB; 2626 desc.buffer_size = 4*KB;
2629 } else { 2627 } else {
2630 desc.buffer_size = 2*buffer_size_; 2628 desc.buffer_size = 2*buffer_size_;
2631 } 2629 }
(...skipping 16 matching lines...) Expand all
2648 #endif 2646 #endif
2649 2647
2650 // Copy the data. 2648 // Copy the data.
2651 int pc_delta = desc.buffer - buffer_; 2649 int pc_delta = desc.buffer - buffer_;
2652 int rc_delta = (desc.buffer + desc.buffer_size) - (buffer_ + buffer_size_); 2650 int rc_delta = (desc.buffer + desc.buffer_size) - (buffer_ + buffer_size_);
2653 memmove(desc.buffer, buffer_, desc.instr_size); 2651 memmove(desc.buffer, buffer_, desc.instr_size);
2654 memmove(rc_delta + reloc_info_writer.pos(), 2652 memmove(rc_delta + reloc_info_writer.pos(),
2655 reloc_info_writer.pos(), desc.reloc_size); 2653 reloc_info_writer.pos(), desc.reloc_size);
2656 2654
2657 // Switch buffers. 2655 // Switch buffers.
2658 if (isolate->assembler_spare_buffer() == NULL && 2656 if (isolate()->assembler_spare_buffer() == NULL &&
2659 buffer_size_ == kMinimalBufferSize) { 2657 buffer_size_ == kMinimalBufferSize) {
2660 isolate->set_assembler_spare_buffer(buffer_); 2658 isolate()->set_assembler_spare_buffer(buffer_);
2661 } else { 2659 } else {
2662 DeleteArray(buffer_); 2660 DeleteArray(buffer_);
2663 } 2661 }
2664 buffer_ = desc.buffer; 2662 buffer_ = desc.buffer;
2665 buffer_size_ = desc.buffer_size; 2663 buffer_size_ = desc.buffer_size;
2666 pc_ += pc_delta; 2664 pc_ += pc_delta;
2667 if (last_pc_ != NULL) { 2665 if (last_pc_ != NULL) {
2668 last_pc_ += pc_delta; 2666 last_pc_ += pc_delta;
2669 } 2667 }
2670 reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta, 2668 reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
(...skipping 124 matching lines...) Expand 10 before | Expand all | Expand 10 after
2795 fprintf(coverage_log, "%s\n", file_line); 2793 fprintf(coverage_log, "%s\n", file_line);
2796 fflush(coverage_log); 2794 fflush(coverage_log);
2797 } 2795 }
2798 } 2796 }
2799 2797
2800 #endif 2798 #endif
2801 2799
2802 } } // namespace v8::internal 2800 } } // namespace v8::internal
2803 2801
2804 #endif // V8_TARGET_ARCH_IA32 2802 #endif // V8_TARGET_ARCH_IA32
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