Index: drivers/tpm/slb9635_i2c/tpm_tis_i2c.c |
diff --git a/drivers/tpm/slb9635_i2c/tpm_tis_i2c.c b/drivers/tpm/slb9635_i2c/tpm_tis_i2c.c |
new file mode 100644 |
index 0000000000000000000000000000000000000000..140296e67b3381dc31ab341bab2ca17b88140cf9 |
--- /dev/null |
+++ b/drivers/tpm/slb9635_i2c/tpm_tis_i2c.c |
@@ -0,0 +1,442 @@ |
+/* |
+ * Copyright (C) 2011 Infineon Technologies |
+ * |
+ * Authors: |
+ * |
+ * Device driver for TCG/TCPA TPM (trusted platform module). |
+ * Specifications at www.trustedcomputinggroup.org |
+ * |
+ * This device driver implements the TPM interface as defined in |
+ * the TCG TPM Interface Spec version 1.2, revision 1.0 and the |
+ * Infineon I2C Protocol Stack Specification v0.12. |
+ * |
+ * It is based on the original tpm_tis device driver from Leendert van |
+ * Dorn and Kyleen Hall. |
+ * |
+ * This program is free software; you can redistribute it and/or |
+ * modify it under the terms of the GNU General Public License as |
+ * published by the Free Software Foundation, version 2 of the |
+ * License. |
+ * |
+ */ |
+#include <common.h> |
+#include <i2c.h> |
+#include <linux/types.h> |
+ |
+#include "compatibility.h" |
+#include "tpm.h" |
+ |
+/* Address of the TPM on the I2C bus */ |
+#define TPM_I2C_ADDR 0x20 |
+/* Max. number of retries for iic read/write */ |
+#define MAX_COUNT 3 |
+/* Sleep between i2c transfers in ms */ |
+#define TPM_MSLEEP_TIME 1 |
+/* max. buffer size required by TPM commands/results */ |
+#define TPM_BUFSIZE 4096 |
+ |
+/* Structure to store I2C TPM specific stuff */ |
+struct tpm_inf_dev { |
+ uint addr; |
+ u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */ |
+}; |
+ |
+static struct tpm_inf_dev tpm_dev = { |
+ .addr = TPM_I2C_ADDR |
+}; |
+ |
+/* I2C Read/Write Functions from U-Boot */ |
+extern int i2c_read_data(uchar chip, uchar *buffer, int len); |
+extern int i2c_write_data(uchar chip, uchar *buffer, int len); |
+ |
+int iic_tpm_read(uint addr, uchar *buffer, int len) |
+{ |
+ int rc; |
+ int count = 0; |
+ |
+ do { |
+ rc = i2c_write_data(tpm_dev.addr, (uchar *) &addr, 1); |
+ msleep2(TPM_MSLEEP_TIME); |
+ //udelay(TPM_MSLEEP_TIME * 1000); |
+ } while ((rc) && (count++ < MAX_COUNT)); |
+ |
+ if (rc) |
+ return -rc; |
+ |
+ count = 0; |
+ do { |
+ rc = i2c_read_data(tpm_dev.addr, buffer, len); |
+ msleep2(TPM_MSLEEP_TIME); |
+ //udelay(TPM_MSLEEP_TIME * 1000); |
+ } while ((rc) && (count++ < MAX_COUNT)); |
+ |
+ if (rc) |
+ return -rc; |
+ |
+ return 0; |
+} |
+ |
+int iic_tpm_write(uint addr, const uchar *buffer, int len) |
+{ |
+ int rc; |
+ int count = 0; |
+ |
+ /* prepare send buffer */ |
+ tpm_dev.buf[0] = addr; |
+ memcpy(&(tpm_dev.buf[1]), buffer, len); |
+ |
+ do { |
+ rc = i2c_write_data(tpm_dev.addr, tpm_dev.buf, len + 1); |
+ } while ((rc) && (count++ < MAX_COUNT)); |
+ |
+ if (rc) |
+ return -rc; |
+ |
+ return 0; |
+} |
+ |
+#define TPM_HEADER_SIZE 10 |
+ |
+enum tis_access { |
+ TPM_ACCESS_VALID = 0x80, |
+ TPM_ACCESS_ACTIVE_LOCALITY = 0x20, |
+ TPM_ACCESS_REQUEST_PENDING = 0x04, |
+ TPM_ACCESS_REQUEST_USE = 0x02, |
+}; |
+ |
+enum tis_status { |
+ TPM_STS_VALID = 0x80, |
+ TPM_STS_COMMAND_READY = 0x40, |
+ TPM_STS_GO = 0x20, |
+ TPM_STS_DATA_AVAIL = 0x10, |
+ TPM_STS_DATA_EXPECT = 0x08, |
+}; |
+ |
+enum tis_defaults { |
+ TIS_SHORT_TIMEOUT = 750, /* ms */ |
+ TIS_LONG_TIMEOUT = 2000, /* 2 sec */ |
+}; |
+ |
+#define TPM_ACCESS(l) (0x0000 | ((l) << 4)) |
+#define TPM_STS(l) (0x0001 | ((l) << 4)) |
+#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4)) |
+#define TPM_DID_VID(l) (0x0006 | ((l) << 4)) |
+ |
+static int check_locality(struct tpm_chip *chip, int l) |
+{ |
+ u8 buf; |
+ |
+ if (iic_tpm_read(TPM_ACCESS(l), &buf, 1) < 0) |
+ return -1; |
+ |
+ if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == |
+ (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) |
+ return chip->vendor.locality = l; |
+ |
+ return -1; |
+} |
+ |
+static void release_locality(struct tpm_chip *chip, int l, int force) |
+{ |
+ u8 buf; |
+ if (iic_tpm_read(TPM_ACCESS(l), &buf, 1) < 0) |
+ return; |
+ |
+ if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == |
+ (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { |
+ buf = TPM_ACCESS_ACTIVE_LOCALITY, |
+ iic_tpm_write(TPM_ACCESS(l), &buf, 1); |
+ } |
+} |
+ |
+static int request_locality(struct tpm_chip *chip, int l) |
+{ |
+ unsigned long stop; |
+ u8 buf = TPM_ACCESS_REQUEST_USE; |
+ |
+ if (check_locality(chip, l) >= 0) |
+ return l; |
+ |
+ iic_tpm_write(TPM_ACCESS(l), &buf, 1); |
+ |
+ /* wait for burstcount */ |
+ jiffies = 0; |
+ stop = jiffies + chip->vendor.timeout_a; |
+ do { |
+ if (check_locality(chip, l) >= 0) |
+ return l; |
+ msleep2(TPM_TIMEOUT); |
+ } while (time_before(jiffies, stop)); |
+ return -1; |
+} |
+ |
+static u8 tpm_tis_i2c_status(struct tpm_chip *chip) |
+{ |
+ /* NOTE: since i2c read may fail, return 0 in this case --> time-out */ |
+ u8 buf; |
+ if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0) |
+ return 0; |
+ else |
+ return buf; |
+} |
+ |
+static void tpm_tis_i2c_ready(struct tpm_chip *chip) |
+{ |
+ /* this causes the current command to be aborted */ |
+ u8 buf = TPM_STS_COMMAND_READY; |
+ iic_tpm_write(TPM_STS(chip->vendor.locality), &buf, 1); |
+} |
+ |
+static int get_burstcount(struct tpm_chip *chip) |
+{ |
+ unsigned long stop; |
+ int burstcnt; |
+ u8 buf[3]; |
+ |
+ /* wait for burstcount */ |
+ /* which timeout value, spec has 2 answers (c & d) */ |
+ jiffies = 0; |
+ stop = jiffies + chip->vendor.timeout_d; |
+ do { |
+ /* Note: STS is little endian */ |
+ if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3) < |
+ 0) { |
+ burstcnt = 0; |
+ } else { |
+ burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0]; |
+ } |
+ |
+ if (burstcnt) |
+ return burstcnt; |
+ msleep2(TPM_TIMEOUT); |
+ } while (time_before(jiffies, stop)); |
+ return -EBUSY; |
+} |
+ |
+static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout) |
+{ |
+ unsigned long stop; |
+ u8 status; |
+ |
+ /* check current status */ |
+ status = tpm_tis_i2c_status(chip); |
+ if ((status & mask) == mask) |
+ return 0; |
+ |
+ jiffies = 0; |
+ stop = jiffies + timeout; |
+ do { |
+ msleep2(TPM_TIMEOUT); |
+ status = tpm_tis_i2c_status(chip); |
+ if ((status & mask) == mask) |
+ return 0; |
+ } while (time_before(jiffies, stop)); |
+ |
+ return -ETIME; |
+} |
+ |
+static int recv_data(struct tpm_chip *chip, u8 * buf, size_t count) |
+{ |
+ size_t size = 0, burstcnt; |
+ int rc; |
+ |
+ while (size < count && |
+ wait_for_stat(chip, |
+ TPM_STS_DATA_AVAIL | TPM_STS_VALID, |
+ chip->vendor.timeout_c) |
+ == 0) { |
+ burstcnt = get_burstcount(chip); |
+ |
+ /* wait for positive burst count */ |
+ if (burstcnt > 0) { |
+ /* limit received data to max. left */ |
+ if ((size_t) burstcnt > (count - size)) |
+ burstcnt = count - size; |
+ |
+ rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality), |
+ &(buf[size]), burstcnt); |
+ if (rc == 0) |
+ size += burstcnt; |
+ } |
+ } |
+ |
+ return size; |
+} |
+ |
+static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 * buf, size_t count) |
+{ |
+ int size = 0; |
+ int expected, status; |
+ |
+ if (count < TPM_HEADER_SIZE) { |
+ size = -EIO; |
+ goto out; |
+ } |
+ |
+ /* read first 10 bytes, including tag, paramsize, and result */ |
+ size = recv_data(chip, buf, TPM_HEADER_SIZE); |
+ if (size < TPM_HEADER_SIZE) { |
+ dev_err(chip->dev, "Unable to read header\n"); |
+ goto out; |
+ } |
+ |
+ expected = switch_endian32(&buf[TPM_RSP_SIZE_BYTE]); |
+ if ((size_t) expected > count) { |
+ size = -EIO; |
+ goto out; |
+ } |
+ |
+ size += recv_data(chip, &buf[TPM_HEADER_SIZE], |
+ expected - TPM_HEADER_SIZE); |
+ if (size < expected) { |
+ dev_err(chip->dev, "Unable to read remainder of result\n"); |
+ size = -ETIME; |
+ goto out; |
+ } |
+ |
+ wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c); |
+ status = tpm_tis_i2c_status(chip); |
+ if (status & TPM_STS_DATA_AVAIL) { /* retry? */ |
+ dev_err(chip->dev, "Error left over data\n"); |
+ size = -EIO; |
+ goto out; |
+ } |
+ |
+out: |
+ tpm_tis_i2c_ready(chip); |
+ release_locality(chip, chip->vendor.locality, 0); |
+ |
+ return size; |
+} |
+ |
+static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 * buf, size_t len) |
+{ |
+ int rc, status, burstcnt; |
+ size_t count = 0; |
+ u8 sts = TPM_STS_GO; |
+ |
+ if (request_locality(chip, 0) < 0) |
+ return -EBUSY; |
+ |
+ status = tpm_tis_i2c_status(chip); |
+ if ((status & TPM_STS_COMMAND_READY) == 0) { |
+ tpm_tis_i2c_ready(chip); |
+ if (wait_for_stat |
+ (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b) < 0) { |
+ rc = -ETIME; |
+ goto out_err; |
+ } |
+ } |
+ |
+ while (count < len - 1) { |
+ burstcnt = get_burstcount(chip); |
+ /* wait for positive burst count */ |
+ if (burstcnt > 0) { |
+ if ((size_t) burstcnt > (len - 1 - count)) |
+ burstcnt = len - 1 - count; |
+ |
+#ifdef CONFIG_TPM_I2C_BURST_LIMITATION |
+ if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION) |
+ burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION; |
+#endif |
+ rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), |
+ &(buf[count]), burstcnt); |
+ if (rc == 0) |
+ count += burstcnt; |
+ |
+ wait_for_stat(chip, TPM_STS_VALID, |
+ chip->vendor.timeout_c); |
+ |
+ status = tpm_tis_i2c_status(chip); |
+ if ((status & TPM_STS_DATA_EXPECT) == 0) { |
+ rc = -EIO; |
+ goto out_err; |
+ } |
+ } |
+ } |
+ |
+ /* write last byte */ |
+ iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1); |
+ wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c); |
+ status = tpm_tis_i2c_status(chip); |
+ if ((status & TPM_STS_DATA_EXPECT) != 0) { |
+ rc = -EIO; |
+ goto out_err; |
+ } |
+ |
+ /* go and do it */ |
+ iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1); |
+ |
+ return len; |
+out_err: |
+ tpm_tis_i2c_ready(chip); |
+ release_locality(chip, chip->vendor.locality, 0); |
+ |
+ return rc; |
+} |
+ |
+static struct tpm_vendor_specific tpm_tis_i2c = { |
+ .status = tpm_tis_i2c_status, |
+ .recv = tpm_tis_i2c_recv, |
+ .send = tpm_tis_i2c_send, |
+ .cancel = tpm_tis_i2c_ready, |
+ .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, |
+ .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, |
+ .req_canceled = TPM_STS_COMMAND_READY, |
+}; |
+ |
+/* initialisation of i2c tpm */ |
+int tpm_tis_i2c_init(struct device *dev) |
+{ |
+ u32 vendor; |
+ int rc = 0; |
+ u8 buf[4]; |
+ struct tpm_chip *chip; |
+ |
+ chip = tpm_register_hardware(dev, &tpm_tis_i2c); |
+ if (chip < 0) { |
+ rc = -ENODEV; |
+ goto out_err; |
+ } |
+ |
+ /* Disable interrupts */ |
+ chip->vendor.irq = 0; |
+ |
+ /* Default timeouts */ |
+ chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); |
+ chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); |
+ chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); |
+ chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); |
+ |
+ if (request_locality(chip, 0) != 0) { |
+ rc = -ENODEV; |
+ goto out_err; |
+ } |
+ |
+ /* read four bytes from DID_VID register */ |
+ if (iic_tpm_read(TPM_DID_VID(0), &(buf[0]), 4) < 0) { |
+ rc = -EIO; |
+ goto out_err; |
+ } |
+ |
+ /* create DID_VID register value, after swapping to little-endian */ |
+ vendor = switch_endian32(&buf[0]); |
+ |
+ dev_info(dev, "1.2 TPM (device-id 0x%X)\n", vendor >> 16); |
+ |
+ return 0; |
+ |
+out_err: |
+ return rc; |
+} |
+ |
+void tpm_tis_i2c_cleanup(struct tpm_chip *chip) |
+{ |
+ release_locality(chip, chip->vendor.locality, 1); |
+} |
+ |
+module_init(init_tis_i2c); |
+module_exit(cleanup_tis_i2c); |
+MODULE_DESCRIPTION("TPM Driver"); |
+MODULE_VERSION("2.0.99"); |
+MODULE_LICENSE("GPL"); |