spi: Tegra2: increase SPI FLASH clock to 24MHz

spi: Tegra2: increase SPI FLASH clock to 24MHz

Signed-off-by: Tom Warren <twarren@nvidia.com>;

R=robotboy@chromium.org
BUG=none
TEST=Added timestamps around SPI env read (128K) and saw the time cut in half

Committed: http://chrome-svn/viewvc/chromeos?view=rev&revision=d41a0b8

[robotboy, 2011-03-31 18:32:56]

http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c
File drivers/spi/tegra2_spi.c (right):

http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c#newcode97
drivers/spi/tegra2_spi.c:97: val |= ((9-1) << 1);		/* div = 9 in 7.1 format */
I'm a little confused by this.  It looks like you're masking off the top and
bottom nibble of val and then setting the bottom bit of the second to bottom
nibble (the bottom nibble that was left alone by the mask).  And the comment
seems to indicate that the divisor is an 8 bit quantity (7.1 fixed point I
assume).  So it seems like the mask above would leave half of the divisor alone.
 I haven't hit the TRM to check the register layout yet.

[robotboy, 2011-03-31 18:39:47]

http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c
File drivers/spi/tegra2_spi.c (right):

http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c#newcode97
drivers/spi/tegra2_spi.c:97: val |= ((9-1) << 1);		/* div = 9 in 7.1 format */
On 2011/03/31 18:32:56, robotboy wrote:
> I'm a little confused by this.  It looks like you're masking off the top and
> bottom nibble of val and then setting the bottom bit of the second to bottom
> nibble (the bottom nibble that was left alone by the mask).  And the comment
> seems to indicate that the divisor is an 8 bit quantity (7.1 fixed point I
> assume).  So it seems like the mask above would leave half of the divisor
alone.
>  I haven't hit the TRM to check the register layout yet.

After consulting the TRM, I think what you want here is:

val &= 0x3fffff00;

-Anton

[Tom Warren, 2011-03-31 19:17:32]

http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c
File drivers/spi/tegra2_spi.c (right):

http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c#newcode97
drivers/spi/tegra2_spi.c:97: val |= ((9-1) << 1);		/* div = 9 in 7.1 format */
Doh! You're right. Worked OK since there was never a divider set that was >8 (by
BootROM or BCT or my old code).

I'll fix & resubmit. Thanks.

[robotboy, 2011-04-04 18:40:32]

On 2011/03/31 19:17:32, Tom Warren wrote:
> http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c
> File drivers/spi/tegra2_spi.c (right):
> 
>
http://codereview.chromium.org/6670098/diff/1/drivers/spi/tegra2_spi.c#newcode97
> drivers/spi/tegra2_spi.c:97: val |= ((9-1) << 1);		/* div = 9 in 7.1 format */
> Doh! You're right. Worked OK since there was never a divider set that was >8
(by
> BootROM or BCT or my old code).
> 
> I'll fix & resubmit. Thanks.

LGTM, thanks.