ARM: Port r7089 to ARM...

ARM: Port r7089 to ARM

Ensure that there is always enough bytes between consequtive calls in optimized code to write a call instruction at the return points without overlapping.

Add a call to deoptimize all functions after running tests with --stress-opt. This will catch some issues with functions which cannot be forcefully deoptimized. Some of the tests failed on ARM with that change without the rest of the changes in this change.

Committed: http://code.google.com/p/v8/source/detail?r=7132

[Rico, 2011-03-10 11:43:02]

Drive by:
Maybe we should have a regression test for this? I actually thought Lasse
committed one, but we might not hit this on arm.

[Lasse Reichstein, 2011-03-10 11:58:47]

LGTM

http://codereview.chromium.org/6661022/diff/5003/samples/shell.cc
File samples/shell.cc (right):

http://codereview.chromium.org/6661022/diff/5003/samples/shell.cc#newcode70
samples/shell.cc:70: return 1;
Thank you! Thank you!

http://codereview.chromium.org/6661022/diff/5003/src/arm/assembler-arm.cc
File src/arm/assembler-arm.cc (right):

http://codereview.chromium.org/6661022/diff/5003/src/arm/assembler-arm.cc#new...
src/arm/assembler-arm.cc:772: uint32_t dummy1, dummy2;
So the change here is that even if must_use_constant_pool(), it may be a single
instruction if it's just the load, whereas before it was assumed that it was
never a single instruction?

http://codereview.chromium.org/6661022/diff/5003/src/arm/assembler-arm.cc#new...
src/arm/assembler-arm.cc:779: if (must_use_constant_pool() ||
!CpuFeatures::IsSupported(ARMv7)) {
Could you force using the constant pool for some instructions, to disable the
movw/t sequence?
It might be useful in cases like this?

http://codereview.chromium.org/6661022/diff/5003/src/arm/macro-assembler-arm.cc
File src/arm/macro-assembler-arm.cc (right):

http://codereview.chromium.org/6661022/diff/5003/src/arm/macro-assembler-arm....
src/arm/macro-assembler-arm.cc:142: size += kInstrSize;
Is this always one instruction to add? Or could it be two (movw,movt,op)?

[Søren Thygesen Gjesse, 2011-03-10 12:47:02]

http://codereview.chromium.org/6661022/diff/5003/samples/shell.cc
File samples/shell.cc (right):

http://codereview.chromium.org/6661022/diff/5003/samples/shell.cc#newcode148
samples/shell.cc:148: v8::Testing::DeoptimizeAll();
Regarding regression tests this added deoptimization of all functions did
trigger an assert in deoptimizer-arm.cc on a handful of tests.

http://codereview.chromium.org/6661022/diff/5003/src/arm/assembler-arm.cc
File src/arm/assembler-arm.cc (right):

http://codereview.chromium.org/6661022/diff/5003/src/arm/assembler-arm.cc#new...
src/arm/assembler-arm.cc:772: uint32_t dummy1, dummy2;
On 2011/03/10 11:58:48, Lasse Reichstein wrote:
> So the change here is that even if must_use_constant_pool(), it may be a
single
> instruction if it's just the load, whereas before it was assumed that it was
> never a single instruction?

Before this was never used to check a mov instruction, and actually gave the
wrong answer if it was. A mov using the constant pool is always a single
instruction where the mov is transformed to an ldr.

http://codereview.chromium.org/6661022/diff/5003/src/arm/assembler-arm.cc#new...
src/arm/assembler-arm.cc:779: if (must_use_constant_pool() ||
!CpuFeatures::IsSupported(ARMv7)) {
On 2011/03/10 11:58:48, Lasse Reichstein wrote:
> Could you force using the constant pool for some instructions, to disable the
> movw/t sequence?
> It might be useful in cases like this?

The only case where movw and movt will be used is when romde is RlocInfo::NONE
or romde is RlocInfo::EXTERNAL_REFERENCE and we are not serializing.

We could, but I think it is better to use movw/movt whenever possible.

http://codereview.chromium.org/6661022/diff/5003/src/arm/macro-assembler-arm.cc
File src/arm/macro-assembler-arm.cc (right):

http://codereview.chromium.org/6661022/diff/5003/src/arm/macro-assembler-arm....
src/arm/macro-assembler-arm.cc:142: size += kInstrSize;
On 2011/03/10 11:58:48, Lasse Reichstein wrote:
> Is this always one instruction to add? Or could it be two (movw,movt,op)?

The initial size is two and the +1 here accounts for the operand taking up an
additional instruction making the total size 2 or 3. And only if rmode is not
RelocInfo::NONE can it be 3 as otherwise the constant pool is used.