ARM: Port new version of ParallelMove's GapResolver to ARM. Add MemOperand s...

src/arm/assembler-arm.h

Index: src/arm/assembler-arm.h
===================================================================
--- src/arm/assembler-arm.h	(revision 6436)
+++ src/arm/assembler-arm.h	(working copy)
@@ -593,7 +593,7 @@
       offset_ = offset;
   }
 
-  uint32_t offset() {
+  uint32_t offset() const {
       ASSERT(rm_.is(no_reg));
       return offset_;
   }
@@ -601,6 +601,14 @@
   Register rn() const { return rn_; }
   Register rm() const { return rm_; }
 
+  bool OffsetIsEncodable() const {
+    return offset_ >= 0 ? is_uint12(offset_) : is_uint12(-offset_);
+  }
+
+  bool OffsetIsVFPEncodable() const {
+    return offset_ % 4 == 0 && offset_ < 1024 && offset_ > -1024;

[Søren Thygesen Gjesse, 2011/01/25 08:33:20]

is_unit8(offset_ >= 0 ? offset_ >> 2 : (-offset_) >> 2) instead of offset_ <
1024 && offset_ > -1024?

+  }
+
  private:
   Register rn_;  // base
   Register rm_;  // register offset
@@ -1065,21 +1073,33 @@
             const Register base,
             int offset,  // Offset must be a multiple of 4.
             const Condition cond = al);
+  void vldr(const DwVfpRegister dst,
+            const MemOperand& src,  // Source cannot be a FieldOperand.

[Søren Thygesen Gjesse, 2011/01/25 08:33:20]

I think the comments "Offset must be a multiple of 4" and "Source cannot be a
FieldOperand" should be removed and a comment added before all the vldr/vstr
functions saying that the offset must be a multiple of 4. FieldOperand is a
macro assembler function and should not be mentioned here. Maybe also mention
that if a MemOperand is used only addressing mode offset is aupported.

[William Hesse, 2011/01/25 17:25:13]

Comments are removed.  These functions now work with any offsets whatsoever.

On 2011/01/25 08:33:20, Søren Gjesse wrote:

+            const Condition cond = al);
 
   void vldr(const SwVfpRegister dst,
             const Register base,
             int offset,  // Offset must be a multiple of 4.
             const Condition cond = al);
+  void vldr(const SwVfpRegister dst,
+            const MemOperand& src,  // Source cannot be a FieldOperand.
+            const Condition cond = al);
 
   void vstr(const DwVfpRegister src,
             const Register base,
             int offset,  // Offset must be a multiple of 4.
             const Condition cond = al);
+  void vstr(const DwVfpRegister src,
+            const MemOperand& dst,  // Destination cannot be a FieldOperand.
+            const Condition cond = al);
 
   void vstr(const SwVfpRegister src,
             const Register base,
             int offset,  // Offset must be a multiple of 4.
             const Condition cond = al);
+  void vstr(const SwVfpRegister src,
+            const MemOperand& dst,  // Destination cannot be a FieldOperand.
+            const Condition cond = al);
 
   void vmov(const DwVfpRegister dst,
             double imm,