Index: src/platform-linux.cc |
diff --git a/src/platform-linux.cc b/src/platform-linux.cc |
index 6948653fedbfdce33e682b2f1d2fcb3a1aab38d0..46c74b017ff0181bd8b2b6ccedd5f51def079cd0 100644 |
--- a/src/platform-linux.cc |
+++ b/src/platform-linux.cc |
@@ -186,21 +186,10 @@ int OS::ActivationFrameAlignment() { |
} |
-#ifdef V8_TARGET_ARCH_ARM |
-// 0xffff0fa0 is the hard coded address of a function provided by |
-// the kernel which implements a memory barrier. On older |
-// ARM architecture revisions (pre-v6) this may be implemented using |
-// a syscall. This address is stable, and in active use (hard coded) |
-// by at least glibc-2.7 and the Android C library. |
-typedef void (*LinuxKernelMemoryBarrierFunc)(void); |
-LinuxKernelMemoryBarrierFunc pLinuxKernelMemoryBarrier __attribute__((weak)) = |
- (LinuxKernelMemoryBarrierFunc) 0xffff0fa0; |
-#endif |
- |
void OS::ReleaseStore(volatile AtomicWord* ptr, AtomicWord value) { |
#if defined(V8_TARGET_ARCH_ARM) && defined(__arm__) |
// Only use on ARM hardware. |
- pLinuxKernelMemoryBarrier(); |
+ MemoryBarrier(); |
#else |
__asm__ __volatile__("" : : : "memory"); |
// An x86 store acts as a release barrier. |