[gcc] GCC 4.5.0=>4.5.1

gcc/gcc/config/mips/mips-dsp.md

Index: gcc/gcc/config/mips/mips-dsp.md
diff --git a/gcc/gcc/config/mips/mips-dsp.md b/gcc/gcc/config/mips/mips-dsp.md
index 03dd6e33f950a46779d3d2f8f97a313b81ab575e..dd2459ebcaf02f76b1965b5784583d1997149fcc 100644
--- a/gcc/gcc/config/mips/mips-dsp.md
+++ b/gcc/gcc/config/mips/mips-dsp.md
@@ -1,3 +1,21 @@
+;; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
+
 (define_constants
   [(CCDSP_PO_REGNUM	182)
    (CCDSP_SC_REGNUM	183)
@@ -1084,11 +1102,10 @@
 (define_insn "mips_bposge"
   [(set (pc)
 	(if_then_else (ge (reg:CCDSP CCDSP_PO_REGNUM)
-			  (match_operand:SI 0 "immediate_operand" "I"))
-		      (label_ref (match_operand 1 "" ""))
+			  (match_operand:SI 1 "immediate_operand" "I"))
+		      (label_ref (match_operand 0 "" ""))
 		      (pc)))]
   "ISA_HAS_DSP"
-  "%*bposge%0\t%1%/"
-  [(set_attr "type"	"branch")
-   (set_attr "mode"	"none")])
+  "%*bposge%1\t%0%/"
+  [(set_attr "type"	"branch")])