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Unified Diff: gcc/gcc/config/mips/mips.opt

Issue 3050029: [gcc] GCC 4.5.0=>4.5.1 (Closed) Base URL: ssh://git@gitrw.chromium.org:9222/nacl-toolchain.git
Patch Set: Created 10 years, 5 months ago
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Index: gcc/gcc/config/mips/mips.opt
diff --git a/gcc/gcc/config/mips/mips.opt b/gcc/gcc/config/mips/mips.opt
index 90167542790c22d70081ca756c4557df4dc4f6b9..188d5e1700690f5d4acdd7d338ebe0f53b81319f 100644
--- a/gcc/gcc/config/mips/mips.opt
+++ b/gcc/gcc/config/mips/mips.opt
@@ -208,6 +208,10 @@ mlong64
Target Report RejectNegative Mask(LONG64)
Use a 64-bit long type
+mmcount-ra-address
+Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
+Pass the address of the ra save location to _mcount in $12
+
mmemcpy
Target Report Mask(MEMCPY)
Don't optimize block moves
@@ -244,6 +248,10 @@ mr10k-cache-barrier=
Target Joined RejectNegative
-mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
+mrelax-pic-calls
+Target Report Mask(RELAX_PIC_CALLS)
+Try to allow the linker to turn PIC calls into direct calls
+
mshared
Target Report Var(TARGET_SHARED) Init(1)
When generating -mabicalls code, make the code suitable for use in shared libraries
@@ -268,6 +276,10 @@ msym32
Target Report Var(TARGET_SYM32)
Assume all symbols have 32-bit values
+msynci
+Target Report Mask(SYNCI)
+Use synci instruction to invalidate i-cache
+
mtune=
Target RejectNegative Joined Var(mips_tune_string)
-mtune=PROCESSOR Optimize the output for PROCESSOR
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