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Unified Diff: firmware/lib/tpm_lite/include/tlcl_structures.h

Issue 3027011: Do not directly manipulate global structs. Work on the local copy instead. (Closed) Base URL: ssh://git@gitrw.chromium.org:9222/vboot_reference.git
Patch Set: . Created 10 years, 5 months ago
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Index: firmware/lib/tpm_lite/include/tlcl_structures.h
diff --git a/firmware/lib/tpm_lite/include/tlcl_structures.h b/firmware/lib/tpm_lite/include/tlcl_structures.h
index 85754bb242cd4a359d2b70235453641eaa6e3a5f..b2ba29d87d0220141a8b578243ec67e692f99dc4 100644
--- a/firmware/lib/tpm_lite/include/tlcl_structures.h
+++ b/firmware/lib/tpm_lite/include/tlcl_structures.h
@@ -1,96 +1,96 @@
/* This file is automatically generated */
-struct {
+struct s_tpm_extend_cmd{
uint8_t buffer[34];
- uint8_t* pcrNum;
- uint8_t* inDigest;
+ uint16_t pcrNum;
+ uint16_t inDigest;
} tpm_extend_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0, 0x14, },
-tpm_extend_cmd.buffer + 10, tpm_extend_cmd.buffer + 14, };
+10, 14, };
-struct {
+struct s_tpm_getpermissions_cmd{
uint8_t buffer[22];
- uint8_t* index;
+ uint16_t index;
} tpm_getpermissions_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0x11, 0x0, 0x0, 0x0, 0x4, },
-tpm_getpermissions_cmd.buffer + 18, };
+18, };
-struct {
+struct s_tpm_getflags_cmd{
uint8_t buffer[22];
} tpm_getflags_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x0, 0x4, 0x0, 0x0, 0x1, 0x8, },
};
-struct {
+struct s_tpm_physicalsetdeactivated_cmd{
uint8_t buffer[11];
- uint8_t* deactivated;
+ uint16_t deactivated;
} tpm_physicalsetdeactivated_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xb, 0x0, 0x0, 0x0, 0x72, },
-tpm_physicalsetdeactivated_cmd.buffer + 10, };
+10, };
-struct {
+struct s_tpm_physicalenable_cmd{
uint8_t buffer[10];
} tpm_physicalenable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x6f, },
};
-struct {
+struct s_tpm_physicaldisable_cmd{
uint8_t buffer[10];
} tpm_physicaldisable_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x70, },
};
-struct {
+struct s_tpm_forceclear_cmd{
uint8_t buffer[10];
} tpm_forceclear_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x5d, },
};
-struct {
+struct s_tpm_readpubek_cmd{
uint8_t buffer[30];
} tpm_readpubek_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x1e, 0x0, 0x0, 0x0, 0x7c, },
};
-struct {
+struct s_tpm_continueselftest_cmd{
uint8_t buffer[10];
} tpm_continueselftest_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53, },
};
-struct {
+struct s_tpm_selftestfull_cmd{
uint8_t buffer[10];
} tpm_selftestfull_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x50, },
};
-struct {
+struct s_tpm_startup_cmd{
uint8_t buffer[12];
} tpm_startup_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1, },
};
-struct {
+struct s_tpm_pplock_cmd{
uint8_t buffer[12];
} tpm_pplock_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x4, },
};
-struct {
+struct s_tpm_ppassert_cmd{
uint8_t buffer[12];
} tpm_ppassert_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x8, },
};
-struct {
+struct s_tpm_nv_read_cmd{
uint8_t buffer[22];
- uint8_t* index;
- uint8_t* length;
+ uint16_t index;
+ uint16_t length;
} tpm_nv_read_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0xcf, },
-tpm_nv_read_cmd.buffer + 10, tpm_nv_read_cmd.buffer + 18, };
+10, 18, };
-struct {
+struct s_tpm_nv_write_cmd{
uint8_t buffer[256];
- uint8_t* index;
- uint8_t* length;
- uint8_t* data;
+ uint16_t index;
+ uint16_t length;
+ uint16_t data;
} tpm_nv_write_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xcd, },
-tpm_nv_write_cmd.buffer + 10, tpm_nv_write_cmd.buffer + 18, tpm_nv_write_cmd.buffer + 22, };
+10, 18, 22, };
-struct {
+struct s_tpm_nv_definespace_cmd{
uint8_t buffer[101];
- uint8_t* index;
- uint8_t* perm;
- uint8_t* size;
+ uint16_t index;
+ uint16_t perm;
+ uint16_t size;
} tpm_nv_definespace_cmd = {{0x0, 0xc1, 0x0, 0x0, 0x0, 0x65, 0x0, 0x0, 0x0, 0xcc, 0x0, 0x18, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x3, 0, 0, 0, 0x1f, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0, 0x17, },
-tpm_nv_definespace_cmd.buffer + 12, tpm_nv_definespace_cmd.buffer + 70, tpm_nv_definespace_cmd.buffer + 77, };
+12, 70, 77, };
const int kWriteInfoLength = 12;
const int kNvDataPublicPermissionsOffset = 60;
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