| Index: src/arm/disasm-arm.cc
|
| ===================================================================
|
| --- src/arm/disasm-arm.cc (revision 4989)
|
| +++ src/arm/disasm-arm.cc (working copy)
|
| @@ -1047,7 +1047,14 @@
|
| if (instr->Bit(4) == 0) {
|
| if (instr->Opc1Field() == 0x7) {
|
| // Other data processing instructions
|
| - if ((instr->Opc2Field() == 0x7) && (instr->Opc3Field() == 0x3)) {
|
| + if ((instr->Opc2Field() == 0x0) && (instr->Opc3Field() == 0x1)) {
|
| + // vmov register to register.
|
| + if (instr->SzField() == 0x1) {
|
| + Format(instr, "vmov.f64'cond 'Dd, 'Dm");
|
| + } else {
|
| + Unknown(instr); // Not used by V8.
|
| + }
|
| + } else if ((instr->Opc2Field() == 0x7) && (instr->Opc3Field() == 0x3)) {
|
| DecodeVCVTBetweenDoubleAndSingle(instr);
|
| } else if ((instr->Opc2Field() == 0x8) && (instr->Opc3Field() & 0x1)) {
|
| DecodeVCVTBetweenFloatingPointAndInteger(instr);
|
|
|