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Issue 2804033: ARM: Special code for raising to the power of an integer... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 5 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1040 // vcmp(Dd, Dm) 1040 // vcmp(Dd, Dm)
1041 // vmrs 1041 // vmrs
1042 // Dd = vsqrt(Dm) 1042 // Dd = vsqrt(Dm)
1043 void Decoder::DecodeTypeVFP(Instr* instr) { 1043 void Decoder::DecodeTypeVFP(Instr* instr) {
1044 ASSERT((instr->TypeField() == 7) && (instr->Bit(24) == 0x0) ); 1044 ASSERT((instr->TypeField() == 7) && (instr->Bit(24) == 0x0) );
1045 ASSERT(instr->Bits(11, 9) == 0x5); 1045 ASSERT(instr->Bits(11, 9) == 0x5);
1046 1046
1047 if (instr->Bit(4) == 0) { 1047 if (instr->Bit(4) == 0) {
1048 if (instr->Opc1Field() == 0x7) { 1048 if (instr->Opc1Field() == 0x7) {
1049 // Other data processing instructions 1049 // Other data processing instructions
1050 if ((instr->Opc2Field() == 0x7) && (instr->Opc3Field() == 0x3)) { 1050 if ((instr->Opc2Field() == 0x0) && (instr->Opc3Field() == 0x1)) {
1051 // vmov register to register.
1052 if (instr->SzField() == 0x1) {
1053 Format(instr, "vmov.f64'cond 'Dd, 'Dm");
1054 } else {
1055 Unknown(instr); // Not used by V8.
1056 }
1057 } else if ((instr->Opc2Field() == 0x7) && (instr->Opc3Field() == 0x3)) {
1051 DecodeVCVTBetweenDoubleAndSingle(instr); 1058 DecodeVCVTBetweenDoubleAndSingle(instr);
1052 } else if ((instr->Opc2Field() == 0x8) && (instr->Opc3Field() & 0x1)) { 1059 } else if ((instr->Opc2Field() == 0x8) && (instr->Opc3Field() & 0x1)) {
1053 DecodeVCVTBetweenFloatingPointAndInteger(instr); 1060 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1054 } else if (((instr->Opc2Field() >> 1) == 0x6) && 1061 } else if (((instr->Opc2Field() >> 1) == 0x6) &&
1055 (instr->Opc3Field() & 0x1)) { 1062 (instr->Opc3Field() & 0x1)) {
1056 DecodeVCVTBetweenFloatingPointAndInteger(instr); 1063 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1057 } else if (((instr->Opc2Field() == 0x4) || (instr->Opc2Field() == 0x5)) && 1064 } else if (((instr->Opc2Field() == 0x4) || (instr->Opc2Field() == 0x5)) &&
1058 (instr->Opc3Field() & 0x1)) { 1065 (instr->Opc3Field() & 0x1)) {
1059 DecodeVCMP(instr); 1066 DecodeVCMP(instr);
1060 } else if (((instr->Opc2Field() == 0x1)) && (instr->Opc3Field() == 0x3)) { 1067 } else if (((instr->Opc2Field() == 0x1)) && (instr->Opc3Field() == 0x3)) {
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1392 pc += d.InstructionDecode(buffer, pc); 1399 pc += d.InstructionDecode(buffer, pc);
1393 fprintf(f, "%p %08x %s\n", 1400 fprintf(f, "%p %08x %s\n",
1394 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1401 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1395 } 1402 }
1396 } 1403 }
1397 1404
1398 1405
1399 } // namespace disasm 1406 } // namespace disasm
1400 1407
1401 #endif // V8_TARGET_ARCH_ARM 1408 #endif // V8_TARGET_ARCH_ARM
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