Index: src/arm/codegen-arm.cc |
=================================================================== |
--- src/arm/codegen-arm.cc (revision 4624) |
+++ src/arm/codegen-arm.cc (working copy) |
@@ -5578,8 +5578,8 @@ |
// Load the key and receiver from the stack to r0 and r1. |
frame_->PopToR1R0(); |
- Register receiver = r0; |
- Register key = r1; |
+ Register key = r0; |
+ Register receiver = r1; |
VirtualFrame::SpilledScope spilled(frame_); |
// The deferred code expects key and receiver in r0 and r1. |
@@ -5595,7 +5595,7 @@ |
// instructions generated need to be fixed, so the constant pool is blocked |
// while generating this code. |
#ifdef DEBUG |
- int kInlinedKeyedLoadInstructions = 19; |
+ int kInlinedKeyedLoadInstructions = 20; |
Label check_inlined_codesize; |
masm_->bind(&check_inlined_codesize); |
#endif |
@@ -5632,15 +5632,13 @@ |
__ add(scratch1, |
scratch1, |
Operand(FixedArray::kHeaderSize - kHeapObjectTag)); |
- __ ldr(r0, |
+ __ ldr(ip, |
Erik Corry
2010/05/10 10:16:48
Ip is a register that is used behind our backs by
Søren Thygesen Gjesse
2010/05/10 10:45:26
Done.
|
MemOperand(scratch1, key, LSL, |
kPointerSizeLog2 - (kSmiTagSize + kSmiShiftSize))); |
- __ cmp(r0, scratch2); |
- // This is the only branch to deferred where r0 and r1 do not contain the |
- // receiver and key. We can't just load undefined here because we have to |
- // check the prototype. |
+ __ cmp(ip, scratch2); |
deferred->Branch(eq); |
+ __ mov(r0, ip); |
// Make sure that the expected number of instructions are generated. |
ASSERT_EQ(kInlinedKeyedLoadInstructions, |
masm_->InstructionsGeneratedSince(&check_inlined_codesize)); |