Fix inlined keyed property load on ARM...

src/arm/codegen-arm.cc

 // Copyright 2010 the V8 project authors. All rights reserved.
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 // modification, are permitted provided that the following conditions are
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 //
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@@ skipping 5560 matching lines @@
     // Inline the keyed load.
     Comment cmnt(masm_, "[ Inlined load from keyed property");
 
     // Counter will be decremented in the deferred code. Placed here to avoid
     // having it in the instruction stream below where patching will occur.
     __ IncrementCounter(&Counters::keyed_load_inline, 1,
                         frame_->scratch0(), frame_->scratch1());
 
     // Load the key and receiver from the stack to r0 and r1.
     frame_->PopToR1R0();
-    Register receiver = r0;
-    Register key = r1;
+    Register key = r0;
+    Register receiver = r1;
     VirtualFrame::SpilledScope spilled(frame_);
 
     // The deferred code expects key and receiver in r0 and r1.
     DeferredReferenceGetKeyedValue* deferred =
         new DeferredReferenceGetKeyedValue();
 
     // Check that the receiver is a heap object.
     __ tst(receiver, Operand(kSmiTagMask));
     deferred->Branch(eq);
 
     // The following instructions are the part of the inlined load keyed
     // property code which can be patched. Therefore the exact number of
     // instructions generated need to be fixed, so the constant pool is blocked
     // while generating this code.
 #ifdef DEBUG
-    int kInlinedKeyedLoadInstructions = 19;
+    int kInlinedKeyedLoadInstructions = 20;
     Label check_inlined_codesize;
     masm_->bind(&check_inlined_codesize);
 #endif
     { Assembler::BlockConstPoolScope block_const_pool(masm_);
       Register scratch1 = VirtualFrame::scratch0();
       Register scratch2 = VirtualFrame::scratch1();
       // Check the map. The null map used below is patched by the inline cache
       // code.
       __ ldr(scratch1, FieldMemOperand(receiver, HeapObject::kMapOffset));
       __ mov(scratch2, Operand(Factory::null_value()));
@@ skipping 16 matching lines @@
       // negative keys.
       __ ldr(scratch2, FieldMemOperand(scratch1, FixedArray::kLengthOffset));
       __ cmp(scratch2, Operand(key, ASR, kSmiTagSize));
       deferred->Branch(ls);  // Unsigned less equal.
 
       // Load and check that the result is not the hole (key is a smi).
       __ LoadRoot(scratch2, Heap::kTheHoleValueRootIndex);
       __ add(scratch1,
              scratch1,
              Operand(FixedArray::kHeaderSize - kHeapObjectTag));
-      __ ldr(r0,
+      __ ldr(ip,

[Erik Corry, 2010/05/10 10:16:48]

Ip is a register that is used behind our backs by the macro assembler.  We are a
little lax about not making the assumption that we can use it for other things. 
In this case we are expecting it to be preserved across four instructions, one
of which is not even generated here (it's in the deferred object's Branch
method).  I would feel better if we used VirtualFrame::scratch0() for this.

[Søren Thygesen Gjesse, 2010/05/10 10:45:26]

Done.

              MemOperand(scratch1, key, LSL,
                         kPointerSizeLog2 - (kSmiTagSize + kSmiShiftSize)));
-      __ cmp(r0, scratch2);
-      // This is the only branch to deferred where r0 and r1 do not contain the
-      // receiver and key.  We can't just load undefined here because we have to
-      // check the prototype.
+      __ cmp(ip, scratch2);
       deferred->Branch(eq);
 
+      __ mov(r0, ip);
       // Make sure that the expected number of instructions are generated.
       ASSERT_EQ(kInlinedKeyedLoadInstructions,
                 masm_->InstructionsGeneratedSince(&check_inlined_codesize));
     }
 
     deferred->BindExit();
   }
 }
 
 
@@ skipping 4306 matching lines @@
 
   // Just jump to runtime to add the two strings.
   __ bind(&string_add_runtime);
   __ TailCallRuntime(Runtime::kStringAdd, 2, 1);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal