| Index: src/x64/assembler-x64-inl.h
|
| ===================================================================
|
| --- src/x64/assembler-x64-inl.h (revision 2230)
|
| +++ src/x64/assembler-x64-inl.h (working copy)
|
| @@ -70,18 +70,18 @@
|
|
|
|
|
| void Assembler::emit_rex_64(Register reg, Register rm_reg) {
|
| - emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
|
| + emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
|
| }
|
|
|
|
|
| void Assembler::emit_rex_64(Register reg, const Operand& op) {
|
| - emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
|
| + emit(0x48 | reg.high_bit() << 2 | op.rex_);
|
| }
|
|
|
|
|
| void Assembler::emit_rex_64(Register rm_reg) {
|
| ASSERT_EQ(rm_reg.code() & 0xf, rm_reg.code());
|
| - emit(0x48 | (rm_reg.code() >> 3));
|
| + emit(0x48 | rm_reg.high_bit());
|
| }
|
|
|
|
|
| @@ -91,17 +91,17 @@
|
|
|
|
|
| void Assembler::emit_rex_32(Register reg, Register rm_reg) {
|
| - emit(0x40 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
|
| + emit(0x40 | reg.high_bit() << 2 | rm_reg.high_bit());
|
| }
|
|
|
|
|
| void Assembler::emit_rex_32(Register reg, const Operand& op) {
|
| - emit(0x40 | (reg.code() & 0x8) >> 1 | op.rex_);
|
| + emit(0x40 | reg.high_bit() << 2 | op.rex_);
|
| }
|
|
|
|
|
| void Assembler::emit_rex_32(Register rm_reg) {
|
| - emit(0x40 | (rm_reg.code() & 0x8) >> 3);
|
| + emit(0x40 | rm_reg.high_bit());
|
| }
|
|
|
|
|
| @@ -111,19 +111,19 @@
|
|
|
|
|
| void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) {
|
| - byte rex_bits = (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3;
|
| + byte rex_bits = reg.high_bit() << 2 | rm_reg.high_bit();
|
| if (rex_bits != 0) emit(0x40 | rex_bits);
|
| }
|
|
|
|
|
| void Assembler::emit_optional_rex_32(Register reg, const Operand& op) {
|
| - byte rex_bits = (reg.code() & 0x8) >> 1 | op.rex_;
|
| + byte rex_bits = reg.high_bit() << 2 | op.rex_;
|
| if (rex_bits != 0) emit(0x40 | rex_bits);
|
| }
|
|
|
|
|
| void Assembler::emit_optional_rex_32(Register rm_reg) {
|
| - if (rm_reg.code() > 0x7) emit(0x41);
|
| + if (rm_reg.high_bit()) emit(0x41);
|
| }
|
|
|
|
|
| @@ -244,11 +244,11 @@
|
| // -----------------------------------------------------------------------------
|
| // Implementation of Operand
|
|
|
| -void Operand::set_modrm(int mod, Register rm) {
|
| - ASSERT((mod & -4) == 0);
|
| - buf_[0] = (mod << 6) | (rm.code() & 0x7);
|
| +void Operand::set_modrm(int mod, Register rm_reg) {
|
| + ASSERT(is_uint2(mod));
|
| + buf_[0] = mod << 6 | rm_reg.low_bits();
|
| // Set REX.B to the high bit of rm.code().
|
| - rex_ |= (rm.code() >> 3);
|
| + rex_ |= rm_reg.high_bit();
|
| }
|
|
|
|
|
| @@ -258,8 +258,8 @@
|
| // Use SIB with no index register only for base rsp or r12. Otherwise we
|
| // would skip the SIB byte entirely.
|
| ASSERT(!index.is(rsp) || base.is(rsp) || base.is(r12));
|
| - buf_[1] = scale << 6 | (index.code() & 0x7) << 3 | (base.code() & 0x7);
|
| - rex_ |= (index.code() >> 3) << 1 | base.code() >> 3;
|
| + buf_[1] = scale << 6 | index.low_bits() << 3 | base.low_bits();
|
| + rex_ |= index.high_bit() << 1 | base.high_bit();
|
| len_ = 2;
|
| }
|
|
|
|
|