Index: include/configs/chromeos/st1q/common.h |
diff --git a/include/configs/chromeos/st1q/common.h b/include/configs/chromeos/st1q/common.h |
index 2733ec916999dc942aa8b4ff2eccf34f2cead577..d2bbc1edef2dd9291e33f013472194fe59118957 100644 |
--- a/include/configs/chromeos/st1q/common.h |
+++ b/include/configs/chromeos/st1q/common.h |
@@ -1,5 +1,5 @@ |
/* |
- * Copyright (c) 2009, Code Aurora Forum. All rights reserved. |
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. |
* |
* (C) Copyright 2002-2005 |
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
@@ -122,7 +122,7 @@ |
#define CONFIG_BOOTDELAY 0 |
#define CONFIG_BOOTARGS "quiet root=/dev/mmcblk0p3 rootwait noresume noswap ro loglevel=1" |
-#define CONFIG_BOOTCOMMAND "if mmc init; then ext2load mmc 0:3 0x20007fc0 boot/vmlinux.uimg; bootm 0x20007fc0; fi;" |
+#define CONFIG_BOOTCOMMAND "if mmcinfo 0; then ext2load mmc 0:3 0x20007fc0 boot/vmlinux.uimg; bootm 0x20007fc0; fi;" |
/* |
* Miscellaneous configurable options |
@@ -165,9 +165,22 @@ |
* Use the serial console. |
*/ |
#define CONFIG_SERIAL_CONSOLE |
-#define CONFIG_STDOUT "serial" |
-#define CONFIG_STDERR "serial" |
-#define CONFIG_STDIN "serial" |
+ |
+/* Console setup */ |
+#if defined(CONFIG_SERIAL_CONSOLE) |
+ #define CONFIG_STDOUT "serial" |
+ #define CONFIG_STDERR "serial" |
+ #define CONFIG_STDIN "serial" |
+#else |
+ #define CONFIG_ARM_DCC |
+ #define CONFIG_ARM_DCC_MULTI |
+ #define CONFIG_CPU_V7 |
+ |
+ #define CONFIG_STDOUT "dcc" |
+ #define CONFIG_STDERR "dcc" |
+ #define CONFIG_STDIN "dcc" |
+#endif |
+ |
#define CONFIG_SYS_CONSOLE_IS_IN_ENV |
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
@@ -194,8 +207,8 @@ |
#define CONFIG_ENV_IS_NOWHERE |
#define CONFIG_ENV_SIZE 0x2000 |
-/* Boot parameter address */ |
-#define CFG_QC_BOOT_PARAM_ADDR PHYS_SDRAM_1 |
+/* Boot parameter address - offset of 0x100 from base of first sdram region */ |
+#define CFG_QC_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) |
/*----------------------------------------------------------------------- |
* The qc_serial driver uses the register names below. Set UART_BASE |
@@ -203,6 +216,16 @@ |
*/ |
#define UART_BASE UART3_BASE |
+#define CONFIG_GENERIC_MMC |
+#define CONFIG_QSD_SDCC |
+ |
+ |
+#ifndef CONFIG_GENERIC_MMC |
+/* This section regarding legacy mmc will be removed once the new |
+ * mmc framework has been verified/tested sufficiently. If there are |
+ * any major issues, you could go back to the legacy mmc by undefining |
+ * the generic mmc code. |
+ */ |
/*----------------------------------------------------------------------- |
* Choose the SD controller to use. SDC1, 2, 3, or 4. |
@@ -213,6 +236,7 @@ |
#define USE_4_BIT_BUS_MODE |
#define CONFIG_SYS_MMC_BASE 0xF0000000 // not used, but defined to prevent compile error |
#define PROC_COMM_VREG_SDC PM_VREG_GP6_ID |
+#endif |
/*----------------------------------------------------------------------- |
* NAND configuration |