Index: drivers/mmc/qsd_sdcc.c |
diff --git a/drivers/mmc/qsd_sdcc.c b/drivers/mmc/qsd_sdcc.c |
index 7319105a8179d0db1ade47383a2ab77db8a8bf7e..f41713ecce9118fc80b00f1065ab7beb25cbb183 100755 |
--- a/drivers/mmc/qsd_sdcc.c |
+++ b/drivers/mmc/qsd_sdcc.c |
@@ -155,13 +155,18 @@ int sdcc_read_data(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
} |
else |
{ |
+ int read_len = ( (data->blocks) * data->blocksize); |
+ |
while( (status = IO_READ32(base + MCI_STATUS)) & MCI_STATUS_READ_DATA_MASK) |
{ |
- if(status & MCI_STATUS__RXDATA_AVLBL___M) |
+ if(byte_count < read_len) |
{ |
- *dest_ptr = IO_READ32(base + MCI_FIFO); |
- dest_ptr++; |
- byte_count += 4; |
+ if(status & MCI_STATUS__RXDATA_AVLBL___M) |
+ { |
+ *dest_ptr = IO_READ32(base + MCI_FIFO); |
+ dest_ptr++; |
+ byte_count += 4; |
+ } |
} |
} |
} |
@@ -174,9 +179,8 @@ static int sdcc_mclk_set(int instance, enum SD_MCLK_speed speed) |
#ifndef USE_PROC_COMM |
#error "use proc_comm" |
#else |
- /* SDCn_NS_REG clk enable bits are turned on automatically as part of */ |
- /* setting clk speed. No need to enable sdcard clk explicitely */ |
proc_comm_set_sdcard_clk(instance, speed); |
+ proc_comm_enable_sdcard_clk(instance); |
#endif /*USE_PROC_COMM*/ |
return 0; |
@@ -488,6 +492,8 @@ int sdcc_init(struct mmc *mmc) |
/* Set the interface clock */ |
proc_comm_set_sdcard_clk(sd->instance, MCLK_400KHz); |
+ proc_comm_enable_sdcard_clk(sd->instance); |
+ |
/* Initialize controller */ |
sdcc_controller_init(sd); |