| Index: cpu/armv7Scorpion/QSD8x50/dram.c
|
| diff --git a/cpu/armv7Scorpion/QSD8x50/dram.c b/cpu/armv7Scorpion/QSD8x50/dram.c
|
| index 231b03ad59d25c3cd8e148ab1eba313ff3468438..7cb7fe8d4008832af73f5eacd8563a7f7b383d6f 100644
|
| --- a/cpu/armv7Scorpion/QSD8x50/dram.c
|
| +++ b/cpu/armv7Scorpion/QSD8x50/dram.c
|
| @@ -1,5 +1,5 @@
|
| /*
|
| - * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
|
| + * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
|
| *
|
| * (C) Copyright 2002
|
| * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
| @@ -61,14 +61,6 @@ int dram_reinit (uint32_t start_addr, uint32_t size, int bank_num)
|
| bd->bi_dram[bank_num].size,
|
| MEM_TYPE_KERNEL);
|
|
|
| - /*
|
| - * ATAGs are always at the base of the first sd ram region.
|
| - * If that is changing, update the resulting ATAG address
|
| - */
|
| - if (0 == bank_num) {
|
| - bd->bi_boot_params = start_addr;
|
| - }
|
| -
|
| return 0;
|
| }
|
|
|
| @@ -78,6 +70,9 @@ int dram_init (void)
|
| #if CONFIG_NR_DRAM_BANKS >= 2
|
| dram_reinit(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE, 1);
|
| #endif
|
| +#if CONFIG_NR_DRAM_BANKS >= 3
|
| + dram_reinit(PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE, 2);
|
| +#endif
|
| return 0;
|
| }
|
|
|
|
|