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Side by Side Diff: src/arm/assembler-arm.h

Issue 10977051: Support for SDIV and MLS ARM instructions, and implement DoModI using them (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 8 years, 2 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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862 SBit s = LeaveCC, Condition cond = al); 862 SBit s = LeaveCC, Condition cond = al);
863 863
864 void mvn(Register dst, const Operand& src, 864 void mvn(Register dst, const Operand& src,
865 SBit s = LeaveCC, Condition cond = al); 865 SBit s = LeaveCC, Condition cond = al);
866 866
867 // Multiply instructions 867 // Multiply instructions
868 868
869 void mla(Register dst, Register src1, Register src2, Register srcA, 869 void mla(Register dst, Register src1, Register src2, Register srcA,
870 SBit s = LeaveCC, Condition cond = al); 870 SBit s = LeaveCC, Condition cond = al);
871 871
872 void mls(Register dst, Register src1, Register src2, Register srcA,
873 Condition cond = al);
874
875 void sdiv(Register dst, Register src1, Register src2,
876 Condition cond = al);
877
872 void mul(Register dst, Register src1, Register src2, 878 void mul(Register dst, Register src1, Register src2,
873 SBit s = LeaveCC, Condition cond = al); 879 SBit s = LeaveCC, Condition cond = al);
874 880
875 void smlal(Register dstL, Register dstH, Register src1, Register src2, 881 void smlal(Register dstL, Register dstH, Register src1, Register src2,
876 SBit s = LeaveCC, Condition cond = al); 882 SBit s = LeaveCC, Condition cond = al);
877 883
878 void smull(Register dstL, Register dstH, Register src1, Register src2, 884 void smull(Register dstL, Register dstH, Register src1, Register src2,
879 SBit s = LeaveCC, Condition cond = al); 885 SBit s = LeaveCC, Condition cond = al);
880 886
881 void umlal(Register dstL, Register dstH, Register src1, Register src2, 887 void umlal(Register dstL, Register dstH, Register src1, Register src2,
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1467 public: 1473 public:
1468 explicit EnsureSpace(Assembler* assembler) { 1474 explicit EnsureSpace(Assembler* assembler) {
1469 assembler->CheckBuffer(); 1475 assembler->CheckBuffer();
1470 } 1476 }
1471 }; 1477 };
1472 1478
1473 1479
1474 } } // namespace v8::internal 1480 } } // namespace v8::internal
1475 1481
1476 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1482 #endif // V8_ARM_ASSEMBLER_ARM_H_
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