MIPS: port Add missing write barrier for arguments store ICs.

MIPS: port Add missing write barrier for arguments store ICs.

Ported r8390 (52d4605)

BUG=
TEST=

Committed: http://code.google.com/p/v8/source/detail?r=8405

[Søren Thygesen Gjesse, 2011-06-24 08:31:57]

LGTM

I will commit it.

[fschneider, 2011-06-24 09:13:38]

Drive-by comments. I think the code is correct, but could be improved:

http://codereview.chromium.org/7238020/diff/1/src/mips/ic-mips.cc
File src/mips/ic-mips.cc (right):

http://codereview.chromium.org/7238020/diff/1/src/mips/ic-mips.cc#newcode1009
src/mips/ic-mips.cc:1009: __ Addu(t2, a3, t1);
Since the store address is already computed by GenerateMappedArgumentsLookup
into t0, I think you could avoid this add here and just write:

__ RecordWrite(a3, t0, t5);

http://codereview.chromium.org/7238020/diff/1/src/mips/ic-mips.cc#newcode1018
src/mips/ic-mips.cc:1018: __ Addu(t2, a3, t0);
Same here. The store address is already computed into t0.