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Side by Side Diff: test/cctest/test-disasm-x64.cc

Issue 998283002: [turbofan] Introduce optional Float64Min and Float64Max machine operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 418 matching lines...) Expand 10 before | Expand all | Expand 10 after
429 __ movdqa(Operand(rbx, rcx, times_4, 10000), xmm0); 429 __ movdqa(Operand(rbx, rcx, times_4, 10000), xmm0);
430 430
431 __ addsd(xmm1, xmm0); 431 __ addsd(xmm1, xmm0);
432 __ addsd(xmm1, Operand(rbx, rcx, times_4, 10000)); 432 __ addsd(xmm1, Operand(rbx, rcx, times_4, 10000));
433 __ mulsd(xmm1, xmm0); 433 __ mulsd(xmm1, xmm0);
434 __ mulsd(xmm1, Operand(rbx, rcx, times_4, 10000)); 434 __ mulsd(xmm1, Operand(rbx, rcx, times_4, 10000));
435 __ subsd(xmm1, xmm0); 435 __ subsd(xmm1, xmm0);
436 __ subsd(xmm1, Operand(rbx, rcx, times_4, 10000)); 436 __ subsd(xmm1, Operand(rbx, rcx, times_4, 10000));
437 __ divsd(xmm1, xmm0); 437 __ divsd(xmm1, xmm0);
438 __ divsd(xmm1, Operand(rbx, rcx, times_4, 10000)); 438 __ divsd(xmm1, Operand(rbx, rcx, times_4, 10000));
439 __ minsd(xmm1, xmm0);
440 __ minsd(xmm1, Operand(rbx, rcx, times_4, 10000));
441 __ maxsd(xmm1, xmm0);
442 __ maxsd(xmm1, Operand(rbx, rcx, times_4, 10000));
439 __ ucomisd(xmm0, xmm1); 443 __ ucomisd(xmm0, xmm1);
440 444
441 __ andpd(xmm0, xmm1); 445 __ andpd(xmm0, xmm1);
442 446
443 __ pslld(xmm0, 6); 447 __ pslld(xmm0, 6);
444 __ psrld(xmm0, 6); 448 __ psrld(xmm0, 6);
445 __ psllq(xmm0, 6); 449 __ psllq(xmm0, 6);
446 __ psrlq(xmm0, 6); 450 __ psrlq(xmm0, 6);
447 451
448 __ pcmpeqd(xmm1, xmm0); 452 __ pcmpeqd(xmm1, xmm0);
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
486 { 490 {
487 if (CpuFeatures::IsSupported(AVX)) { 491 if (CpuFeatures::IsSupported(AVX)) {
488 CpuFeatureScope scope(&assm, AVX); 492 CpuFeatureScope scope(&assm, AVX);
489 __ vaddsd(xmm0, xmm1, xmm2); 493 __ vaddsd(xmm0, xmm1, xmm2);
490 __ vaddsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); 494 __ vaddsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
491 __ vmulsd(xmm0, xmm1, xmm2); 495 __ vmulsd(xmm0, xmm1, xmm2);
492 __ vmulsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); 496 __ vmulsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
493 __ vsubsd(xmm0, xmm1, xmm2); 497 __ vsubsd(xmm0, xmm1, xmm2);
494 __ vsubsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); 498 __ vsubsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
495 __ vdivsd(xmm0, xmm1, xmm2); 499 __ vdivsd(xmm0, xmm1, xmm2);
496 __ vdivsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); 500 __ vdivsd(xmm0, xmm1, Operand(rbx, rcx, times_2, 10000));
501 __ vminsd(xmm8, xmm1, xmm2);
502 __ vminsd(xmm9, xmm1, Operand(rbx, rcx, times_8, 10000));
503 __ vmaxsd(xmm8, xmm1, xmm2);
504 __ vmaxsd(xmm9, xmm1, Operand(rbx, rcx, times_1, 10000));
497 } 505 }
498 } 506 }
499 507
500 // FMA3 instruction 508 // FMA3 instruction
501 { 509 {
502 if (CpuFeatures::IsSupported(FMA3)) { 510 if (CpuFeatures::IsSupported(FMA3)) {
503 CpuFeatureScope scope(&assm, FMA3); 511 CpuFeatureScope scope(&assm, FMA3);
504 __ vfmadd132sd(xmm0, xmm1, xmm2); 512 __ vfmadd132sd(xmm0, xmm1, xmm2);
505 __ vfmadd132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000)); 513 __ vfmadd132sd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
506 __ vfmadd213sd(xmm0, xmm1, xmm2); 514 __ vfmadd213sd(xmm0, xmm1, xmm2);
(...skipping 81 matching lines...) Expand 10 before | Expand all | Expand 10 after
588 #ifdef OBJECT_PRINT 596 #ifdef OBJECT_PRINT
589 OFStream os(stdout); 597 OFStream os(stdout);
590 code->Print(os); 598 code->Print(os);
591 byte* begin = code->instruction_start(); 599 byte* begin = code->instruction_start();
592 byte* end = begin + code->instruction_size(); 600 byte* end = begin + code->instruction_size();
593 disasm::Disassembler::Disassemble(stdout, begin, end); 601 disasm::Disassembler::Disassemble(stdout, begin, end);
594 #endif 602 #endif
595 } 603 }
596 604
597 #undef __ 605 #undef __
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