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Issue 998283002: [turbofan] Introduce optional Float64Min and Float64Max machine operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 8
9 #include "src/v8.h" 9 #include "src/v8.h"
10 10
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949 case 0x59: 949 case 0x59:
950 AppendToBuffer("vmulsd %s,%s,", NameOfXMMRegister(regop), 950 AppendToBuffer("vmulsd %s,%s,", NameOfXMMRegister(regop),
951 NameOfXMMRegister(vvvv)); 951 NameOfXMMRegister(vvvv));
952 current += PrintRightXMMOperand(current); 952 current += PrintRightXMMOperand(current);
953 break; 953 break;
954 case 0x5c: 954 case 0x5c:
955 AppendToBuffer("vsubsd %s,%s,", NameOfXMMRegister(regop), 955 AppendToBuffer("vsubsd %s,%s,", NameOfXMMRegister(regop),
956 NameOfXMMRegister(vvvv)); 956 NameOfXMMRegister(vvvv));
957 current += PrintRightXMMOperand(current); 957 current += PrintRightXMMOperand(current);
958 break; 958 break;
959 case 0x5d:
960 AppendToBuffer("vminsd %s,%s,", NameOfXMMRegister(regop),
961 NameOfXMMRegister(vvvv));
962 current += PrintRightXMMOperand(current);
963 break;
959 case 0x5e: 964 case 0x5e:
960 AppendToBuffer("vdivsd %s,%s,", NameOfXMMRegister(regop), 965 AppendToBuffer("vdivsd %s,%s,", NameOfXMMRegister(regop),
961 NameOfXMMRegister(vvvv)); 966 NameOfXMMRegister(vvvv));
962 current += PrintRightXMMOperand(current); 967 current += PrintRightXMMOperand(current);
963 break; 968 break;
969 case 0x5f:
970 AppendToBuffer("vmaxsd %s,%s,", NameOfXMMRegister(regop),
971 NameOfXMMRegister(vvvv));
972 current += PrintRightXMMOperand(current);
973 break;
964 default: 974 default:
965 UnimplementedInstruction(); 975 UnimplementedInstruction();
966 } 976 }
967 } else { 977 } else {
968 UnimplementedInstruction(); 978 UnimplementedInstruction();
969 } 979 }
970 980
971 return static_cast<int>(current - data); 981 return static_cast<int>(current - data);
972 } 982 }
973 983
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1536 case 0x2A: // F2/F3 prefix. 1546 case 0x2A: // F2/F3 prefix.
1537 return "cvtsi2s"; 1547 return "cvtsi2s";
1538 case 0x51: // F2 prefix. 1548 case 0x51: // F2 prefix.
1539 return "sqrtsd"; 1549 return "sqrtsd";
1540 case 0x58: // F2 prefix. 1550 case 0x58: // F2 prefix.
1541 return "addsd"; 1551 return "addsd";
1542 case 0x59: // F2 prefix. 1552 case 0x59: // F2 prefix.
1543 return "mulsd"; 1553 return "mulsd";
1544 case 0x5A: // F2 prefix. 1554 case 0x5A: // F2 prefix.
1545 return "cvtsd2ss"; 1555 return "cvtsd2ss";
1556 case 0x5D: // F2 prefix.
1557 return "minsd";
1546 case 0x5C: // F2 prefix. 1558 case 0x5C: // F2 prefix.
1547 return "subsd"; 1559 return "subsd";
1548 case 0x5E: // F2 prefix. 1560 case 0x5E: // F2 prefix.
1549 return "divsd"; 1561 return "divsd";
1562 case 0x5F: // F2 prefix.
1563 return "maxsd";
1550 case 0xA2: 1564 case 0xA2:
1551 return "cpuid"; 1565 return "cpuid";
1552 case 0xA5: 1566 case 0xA5:
1553 return "shld"; 1567 return "shld";
1554 case 0xAB: 1568 case 0xAB:
1555 return "bts"; 1569 return "bts";
1556 case 0xAD: 1570 case 0xAD:
1557 return "shrd"; 1571 return "shrd";
1558 case 0xAF: 1572 case 0xAF:
1559 return "imul"; 1573 return "imul";
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2130 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { 2144 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
2131 fprintf(f, " "); 2145 fprintf(f, " ");
2132 } 2146 }
2133 fprintf(f, " %s\n", buffer.start()); 2147 fprintf(f, " %s\n", buffer.start());
2134 } 2148 }
2135 } 2149 }
2136 2150
2137 } // namespace disasm 2151 } // namespace disasm
2138 2152
2139 #endif // V8_TARGET_ARCH_X64 2153 #endif // V8_TARGET_ARCH_X64
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