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Issue 998283002: [turbofan] Introduce optional Float64Min and Float64Max machine operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 8
9 #include "src/v8.h" 9 #include "src/v8.h"
10 10
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819 case 0x59: 819 case 0x59:
820 AppendToBuffer("vmulsd %s,%s,", NameOfXMMRegister(regop), 820 AppendToBuffer("vmulsd %s,%s,", NameOfXMMRegister(regop),
821 NameOfXMMRegister(vvvv)); 821 NameOfXMMRegister(vvvv));
822 current += PrintRightXMMOperand(current); 822 current += PrintRightXMMOperand(current);
823 break; 823 break;
824 case 0x5c: 824 case 0x5c:
825 AppendToBuffer("vsubsd %s,%s,", NameOfXMMRegister(regop), 825 AppendToBuffer("vsubsd %s,%s,", NameOfXMMRegister(regop),
826 NameOfXMMRegister(vvvv)); 826 NameOfXMMRegister(vvvv));
827 current += PrintRightXMMOperand(current); 827 current += PrintRightXMMOperand(current);
828 break; 828 break;
829 case 0x5d:
830 AppendToBuffer("vminsd %s,%s,", NameOfXMMRegister(regop),
831 NameOfXMMRegister(vvvv));
832 current += PrintRightXMMOperand(current);
833 break;
829 case 0x5e: 834 case 0x5e:
830 AppendToBuffer("vdivsd %s,%s,", NameOfXMMRegister(regop), 835 AppendToBuffer("vdivsd %s,%s,", NameOfXMMRegister(regop),
831 NameOfXMMRegister(vvvv)); 836 NameOfXMMRegister(vvvv));
832 current += PrintRightXMMOperand(current); 837 current += PrintRightXMMOperand(current);
833 break; 838 break;
839 case 0x5f:
840 AppendToBuffer("vmaxsd %s,%s,", NameOfXMMRegister(regop),
841 NameOfXMMRegister(vvvv));
842 current += PrintRightXMMOperand(current);
843 break;
834 default: 844 default:
835 UnimplementedInstruction(); 845 UnimplementedInstruction();
836 } 846 }
837 } else { 847 } else {
838 UnimplementedInstruction(); 848 UnimplementedInstruction();
839 } 849 }
840 850
841 return static_cast<int>(current - data); 851 return static_cast<int>(current - data);
842 } 852 }
843 853
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1751 } else { 1761 } else {
1752 const char* mnem = "?"; 1762 const char* mnem = "?";
1753 switch (b2) { 1763 switch (b2) {
1754 case 0x2A: mnem = "cvtsi2sd"; break; 1764 case 0x2A: mnem = "cvtsi2sd"; break;
1755 case 0x2C: mnem = "cvttsd2si"; break; 1765 case 0x2C: mnem = "cvttsd2si"; break;
1756 case 0x2D: mnem = "cvtsd2si"; break; 1766 case 0x2D: mnem = "cvtsd2si"; break;
1757 case 0x51: mnem = "sqrtsd"; break; 1767 case 0x51: mnem = "sqrtsd"; break;
1758 case 0x58: mnem = "addsd"; break; 1768 case 0x58: mnem = "addsd"; break;
1759 case 0x59: mnem = "mulsd"; break; 1769 case 0x59: mnem = "mulsd"; break;
1760 case 0x5C: mnem = "subsd"; break; 1770 case 0x5C: mnem = "subsd"; break;
1771 case 0x5D:
1772 mnem = "minsd";
1773 break;
1761 case 0x5E: mnem = "divsd"; break; 1774 case 0x5E: mnem = "divsd"; break;
1775 case 0x5F:
1776 mnem = "maxsd";
1777 break;
1762 } 1778 }
1763 data += 3; 1779 data += 3;
1764 int mod, regop, rm; 1780 int mod, regop, rm;
1765 get_modrm(*data, &mod, &regop, &rm); 1781 get_modrm(*data, &mod, &regop, &rm);
1766 if (b2 == 0x2A) { 1782 if (b2 == 0x2A) {
1767 AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop)); 1783 AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
1768 data += PrintRightOperand(data); 1784 data += PrintRightOperand(data);
1769 } else if (b2 == 0x2C || b2 == 0x2D) { 1785 } else if (b2 == 0x2C || b2 == 0x2D) {
1770 AppendToBuffer("%s %s,", mnem, NameOfCPURegister(regop)); 1786 AppendToBuffer("%s %s,", mnem, NameOfCPURegister(regop));
1771 data += PrintRightXMMOperand(data); 1787 data += PrintRightXMMOperand(data);
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2004 fprintf(f, " "); 2020 fprintf(f, " ");
2005 } 2021 }
2006 fprintf(f, " %s\n", buffer.start()); 2022 fprintf(f, " %s\n", buffer.start());
2007 } 2023 }
2008 } 2024 }
2009 2025
2010 2026
2011 } // namespace disasm 2027 } // namespace disasm
2012 2028
2013 #endif // V8_TARGET_ARCH_IA32 2029 #endif // V8_TARGET_ARCH_IA32
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